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authorAlex Deucher <alexander.deucher@amd.com>2012-12-03 11:52:49 -0500
committerAlex Deucher <alexander.deucher@amd.com>2012-12-03 12:00:35 -0500
commitfbed600af159b9dce78dd74c4bff56b40bb19d47 (patch)
treec32d54bbf9908c91aaa568c8c01d3dd2821528c5 /drivers/gpu/drm/radeon/rv770d.h
parente548a83c34806b8bc2c55f52d3bc481a13a3829e (diff)
drm/radeon/dce3.2: add registers for ELD handling
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Diffstat (limited to 'drivers/gpu/drm/radeon/rv770d.h')
-rw-r--r--drivers/gpu/drm/radeon/rv770d.h48
1 files changed, 48 insertions, 0 deletions
diff --git a/drivers/gpu/drm/radeon/rv770d.h b/drivers/gpu/drm/radeon/rv770d.h
index b0adfc595d75..e2d9dc8e751e 100644
--- a/drivers/gpu/drm/radeon/rv770d.h
+++ b/drivers/gpu/drm/radeon/rv770d.h
@@ -551,6 +551,54 @@
551#define HDMI_OFFSET0 (0x7400 - 0x7400) 551#define HDMI_OFFSET0 (0x7400 - 0x7400)
552#define HDMI_OFFSET1 (0x7800 - 0x7400) 552#define HDMI_OFFSET1 (0x7800 - 0x7400)
553 553
554/* DCE3.2 ELD audio interface */
555#define AZ_F0_CODEC_PIN0_CONTROL_AUDIO_DESCRIPTOR0 0x71c8 /* LPCM */
556#define AZ_F0_CODEC_PIN0_CONTROL_AUDIO_DESCRIPTOR1 0x71cc /* AC3 */
557#define AZ_F0_CODEC_PIN0_CONTROL_AUDIO_DESCRIPTOR2 0x71d0 /* MPEG1 */
558#define AZ_F0_CODEC_PIN0_CONTROL_AUDIO_DESCRIPTOR3 0x71d4 /* MP3 */
559#define AZ_F0_CODEC_PIN0_CONTROL_AUDIO_DESCRIPTOR4 0x71d8 /* MPEG2 */
560#define AZ_F0_CODEC_PIN0_CONTROL_AUDIO_DESCRIPTOR5 0x71dc /* AAC */
561#define AZ_F0_CODEC_PIN0_CONTROL_AUDIO_DESCRIPTOR6 0x71e0 /* DTS */
562#define AZ_F0_CODEC_PIN0_CONTROL_AUDIO_DESCRIPTOR7 0x71e4 /* ATRAC */
563#define AZ_F0_CODEC_PIN0_CONTROL_AUDIO_DESCRIPTOR8 0x71e8 /* one bit audio - leave at 0 (default) */
564#define AZ_F0_CODEC_PIN0_CONTROL_AUDIO_DESCRIPTOR9 0x71ec /* Dolby Digital */
565#define AZ_F0_CODEC_PIN0_CONTROL_AUDIO_DESCRIPTOR10 0x71f0 /* DTS-HD */
566#define AZ_F0_CODEC_PIN0_CONTROL_AUDIO_DESCRIPTOR11 0x71f4 /* MAT-MLP */
567#define AZ_F0_CODEC_PIN0_CONTROL_AUDIO_DESCRIPTOR12 0x71f8 /* DTS */
568#define AZ_F0_CODEC_PIN0_CONTROL_AUDIO_DESCRIPTOR13 0x71fc /* WMA Pro */
569# define MAX_CHANNELS(x) (((x) & 0x7) << 0)
570/* max channels minus one. 7 = 8 channels */
571# define SUPPORTED_FREQUENCIES(x) (((x) & 0xff) << 8)
572# define DESCRIPTOR_BYTE_2(x) (((x) & 0xff) << 16)
573# define SUPPORTED_FREQUENCIES_STEREO(x) (((x) & 0xff) << 24) /* LPCM only */
574/* SUPPORTED_FREQUENCIES, SUPPORTED_FREQUENCIES_STEREO
575 * bit0 = 32 kHz
576 * bit1 = 44.1 kHz
577 * bit2 = 48 kHz
578 * bit3 = 88.2 kHz
579 * bit4 = 96 kHz
580 * bit5 = 176.4 kHz
581 * bit6 = 192 kHz
582 */
583
584#define AZ_HOT_PLUG_CONTROL 0x7300
585# define AZ_FORCE_CODEC_WAKE (1 << 0)
586# define PIN0_JACK_DETECTION_ENABLE (1 << 4)
587# define PIN1_JACK_DETECTION_ENABLE (1 << 5)
588# define PIN2_JACK_DETECTION_ENABLE (1 << 6)
589# define PIN3_JACK_DETECTION_ENABLE (1 << 7)
590# define PIN0_UNSOLICITED_RESPONSE_ENABLE (1 << 8)
591# define PIN1_UNSOLICITED_RESPONSE_ENABLE (1 << 9)
592# define PIN2_UNSOLICITED_RESPONSE_ENABLE (1 << 10)
593# define PIN3_UNSOLICITED_RESPONSE_ENABLE (1 << 11)
594# define CODEC_HOT_PLUG_ENABLE (1 << 12)
595# define PIN0_AUDIO_ENABLED (1 << 24)
596# define PIN1_AUDIO_ENABLED (1 << 25)
597# define PIN2_AUDIO_ENABLED (1 << 26)
598# define PIN3_AUDIO_ENABLED (1 << 27)
599# define AUDIO_ENABLED (1 << 31)
600
601
554#define D1GRPH_PRIMARY_SURFACE_ADDRESS 0x6110 602#define D1GRPH_PRIMARY_SURFACE_ADDRESS 0x6110
555#define D1GRPH_PRIMARY_SURFACE_ADDRESS_HIGH 0x6914 603#define D1GRPH_PRIMARY_SURFACE_ADDRESS_HIGH 0x6914
556#define D2GRPH_PRIMARY_SURFACE_ADDRESS_HIGH 0x6114 604#define D2GRPH_PRIMARY_SURFACE_ADDRESS_HIGH 0x6114