drm/radeon: UVD bringup v8

Just everything needed to decode videos using UVD.

v6: just all the bugfixes and support for R7xx-SI merged in one patch
v7: UVD_CGC_GATE is a write only register, lockup detection fix
v8: split out VRAM fallback changes, remove support for RV770,
    add support for HEMLOCK, add buffer sizes checks

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Jerome Glisse <jglisse@redhat.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

1 files changed, 14 insertions, 0 deletions

diff --git a/drivers/gpu/drm/radeon/rv770d.h b/drivers/gpu/drm/radeon/rv770d.h
index c55f950a4af7..da158b541720 100644
--- a/drivers/gpu/drm/radeon/rv770d.h
+++ b/drivers/gpu/drm/radeon/rv770d.h
@@ -671,4 +671,18 @@
 #       define TARGET_LINK_SPEED_MASK                     (0xf << 0)
 #       define SELECTABLE_DEEMPHASIS                      (1 << 6)
 
+/* UVD */
+#define UVD_LMI_EXT40_ADDR                              0xf498
+#define UVD_VCPU_CHIP_ID                                0xf4d4
+#define UVD_VCPU_CACHE_OFFSET0                          0xf4d8
+#define UVD_VCPU_CACHE_SIZE0                            0xf4dc
+#define UVD_VCPU_CACHE_OFFSET1                          0xf4e0
+#define UVD_VCPU_CACHE_SIZE1                            0xf4e4
+#define UVD_VCPU_CACHE_OFFSET2                          0xf4e8
+#define UVD_VCPU_CACHE_SIZE2                            0xf4ec
+#define UVD_LMI_ADDR_EXT                                0xf594
+
+#define UVD_RBC_RB_RPTR                                 0xf690
+#define UVD_RBC_RB_WPTR                                 0xf694
+
 #endif