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authorDave Airlie <airlied@redhat.com>2009-07-21 06:39:30 -0400
committerDave Airlie <airlied@redhat.com>2009-07-29 01:53:25 -0400
commit7a50f01a4ab89d5c05eb2cf62e206ac0bfc61d2c (patch)
treea73ed14d4f0bc51e52fa68563f9a26117ea6fed6 /drivers/gpu/drm/radeon/rv515.c
parent664f86590295217b2319edf88830e87b800f6c4a (diff)
drm/radeon/kms: vram sizing on certain r100 chips needs workaround.
If an rn50/r100/m6/m7 GPU has < 64MB RAM, i.e. 8/16/32, the aperture used to calculate the MC_FB_LOCATION needs to be worked out from the CONFIG_APER_SIZE register, and not the actual vram size. TTM VRAM size was also being initialised wrong, use actual vram size to initialise it. Signed-off-by: Dave Airlie <airlied@redhat.com>
Diffstat (limited to 'drivers/gpu/drm/radeon/rv515.c')
-rw-r--r--drivers/gpu/drm/radeon/rv515.c7
1 files changed, 2 insertions, 5 deletions
diff --git a/drivers/gpu/drm/radeon/rv515.c b/drivers/gpu/drm/radeon/rv515.c
index 4fd411893b91..551e608702e4 100644
--- a/drivers/gpu/drm/radeon/rv515.c
+++ b/drivers/gpu/drm/radeon/rv515.c
@@ -100,10 +100,10 @@ int rv515_mc_init(struct radeon_device *rdev)
100 "programming pipes. Bad things might happen.\n"); 100 "programming pipes. Bad things might happen.\n");
101 } 101 }
102 /* Write VRAM size in case we are limiting it */ 102 /* Write VRAM size in case we are limiting it */
103 WREG32(RADEON_CONFIG_MEMSIZE, rdev->mc.vram_size); 103 WREG32(RADEON_CONFIG_MEMSIZE, rdev->mc.real_vram_size);
104 tmp = REG_SET(MC_FB_START, rdev->mc.vram_location >> 16); 104 tmp = REG_SET(MC_FB_START, rdev->mc.vram_location >> 16);
105 WREG32(0x134, tmp); 105 WREG32(0x134, tmp);
106 tmp = rdev->mc.vram_location + rdev->mc.vram_size - 1; 106 tmp = rdev->mc.vram_location + rdev->mc.mc_vram_size - 1;
107 tmp = REG_SET(MC_FB_TOP, tmp >> 16); 107 tmp = REG_SET(MC_FB_TOP, tmp >> 16);
108 tmp |= REG_SET(MC_FB_START, rdev->mc.vram_location >> 16); 108 tmp |= REG_SET(MC_FB_START, rdev->mc.vram_location >> 16);
109 WREG32_MC(MC_FB_LOCATION, tmp); 109 WREG32_MC(MC_FB_LOCATION, tmp);
@@ -369,10 +369,7 @@ void rv515_vram_info(struct radeon_device *rdev)
369 fixed20_12 a; 369 fixed20_12 a;
370 370
371 rv515_vram_get_type(rdev); 371 rv515_vram_get_type(rdev);
372 rdev->mc.vram_size = RREG32(CONFIG_MEMSIZE);
373 372
374 rdev->mc.aper_base = drm_get_resource_start(rdev->ddev, 0);
375 rdev->mc.aper_size = drm_get_resource_len(rdev->ddev, 0);
376 /* FIXME: we should enforce default clock in case GPU is not in 373 /* FIXME: we should enforce default clock in case GPU is not in
377 * default setup 374 * default setup
378 */ 375 */