diff options
author | Alex Deucher <alexander.deucher@amd.com> | 2012-03-28 13:19:06 -0400 |
---|---|---|
committer | Dave Airlie <airlied@redhat.com> | 2012-04-24 04:50:13 -0400 |
commit | 3a2a67aa28725bb500505087067e7830cfa9c137 (patch) | |
tree | 86194e6e69f34092d19aa8970d9c09fba7423ade /drivers/gpu/drm/radeon/rs600d.h | |
parent | eccea7920cfb009c2fa40e9ecdce8c36f61cab66 (diff) |
drm/radeon/kms: add register definitions for audio
This adds register definitions for HDMI/DP audio on
DCE2/3/4/5 hardware.
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
Diffstat (limited to 'drivers/gpu/drm/radeon/rs600d.h')
-rw-r--r-- | drivers/gpu/drm/radeon/rs600d.h | 14 |
1 files changed, 14 insertions, 0 deletions
diff --git a/drivers/gpu/drm/radeon/rs600d.h b/drivers/gpu/drm/radeon/rs600d.h index a27c13ac47c3..f1f89414dc63 100644 --- a/drivers/gpu/drm/radeon/rs600d.h +++ b/drivers/gpu/drm/radeon/rs600d.h | |||
@@ -485,6 +485,20 @@ | |||
485 | #define S_007D18_DC_HOT_PLUG_DETECT2_INT_EN(x) (((x) & 0x1) << 16) | 485 | #define S_007D18_DC_HOT_PLUG_DETECT2_INT_EN(x) (((x) & 0x1) << 16) |
486 | #define G_007D18_DC_HOT_PLUG_DETECT2_INT_EN(x) (((x) >> 16) & 0x1) | 486 | #define G_007D18_DC_HOT_PLUG_DETECT2_INT_EN(x) (((x) >> 16) & 0x1) |
487 | #define C_007D18_DC_HOT_PLUG_DETECT2_INT_EN 0xFFFEFFFF | 487 | #define C_007D18_DC_HOT_PLUG_DETECT2_INT_EN 0xFFFEFFFF |
488 | #define R_007404_HDMI0_STATUS 0x007404 | ||
489 | #define S_007404_HDMI0_AZ_FORMAT_WTRIG(x) (((x) & 0x1) << 28) | ||
490 | #define G_007404_HDMI0_AZ_FORMAT_WTRIG(x) (((x) >> 28) & 0x1) | ||
491 | #define C_007404_HDMI0_AZ_FORMAT_WTRIG 0xEFFFFFFF | ||
492 | #define S_007404_HDMI0_AZ_FORMAT_WTRIG_INT(x) (((x) & 0x1) << 29) | ||
493 | #define G_007404_HDMI0_AZ_FORMAT_WTRIG_INT(x) (((x) >> 29) & 0x1) | ||
494 | #define C_007404_HDMI0_AZ_FORMAT_WTRIG_INT 0xDFFFFFFF | ||
495 | #define R_007408_HDMI0_AUDIO_PACKET_CONTROL 0x007408 | ||
496 | #define S_007408_HDMI0_AZ_FORMAT_WTRIG_MASK(x) (((x) & 0x1) << 28) | ||
497 | #define G_007408_HDMI0_AZ_FORMAT_WTRIG_MASK(x) (((x) >> 28) & 0x1) | ||
498 | #define C_007408_HDMI0_AZ_FORMAT_WTRIG_MASK 0xEFFFFFFF | ||
499 | #define S_007408_HDMI0_AZ_FORMAT_WTRIG_ACK(x) (((x) & 0x1) << 29) | ||
500 | #define G_007408_HDMI0_AZ_FORMAT_WTRIG_ACK(x) (((x) >> 29) & 0x1) | ||
501 | #define C_007408_HDMI0_AZ_FORMAT_WTRIG_ACK 0xDFFFFFFF | ||
488 | 502 | ||
489 | /* MC registers */ | 503 | /* MC registers */ |
490 | #define R_000000_MC_STATUS 0x000000 | 504 | #define R_000000_MC_STATUS 0x000000 |