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authorAlex Deucher <alexdeucher@gmail.com>2009-12-03 13:08:53 -0500
committerDave Airlie <airlied@redhat.com>2009-12-07 19:46:34 -0500
commitb500f68045058454549f5f8553110ef086d8d06b (patch)
tree1ae853d3fb595c6c124d4111021d4fd188dfee92 /drivers/gpu/drm/radeon/rs600d.h
parenteed45b30cd1423f8dc10b4312700773cac13c1c8 (diff)
drm/radeon/kms: add regs and irq tracking bits for hpd
Signed-off-by: Alex Deucher <alexdeucher@gmail.com> Signed-off-by: Dave Airlie <airlied@redhat.com>
Diffstat (limited to 'drivers/gpu/drm/radeon/rs600d.h')
-rw-r--r--drivers/gpu/drm/radeon/rs600d.h112
1 files changed, 90 insertions, 22 deletions
diff --git a/drivers/gpu/drm/radeon/rs600d.h b/drivers/gpu/drm/radeon/rs600d.h
index 81308924859a..c1c8f5885cbb 100644
--- a/drivers/gpu/drm/radeon/rs600d.h
+++ b/drivers/gpu/drm/radeon/rs600d.h
@@ -30,27 +30,12 @@
30 30
31/* Registers */ 31/* Registers */
32#define R_000040_GEN_INT_CNTL 0x000040 32#define R_000040_GEN_INT_CNTL 0x000040
33#define S_000040_DISPLAY_INT_STATUS(x) (((x) & 0x1) << 0) 33#define S_000040_SCRATCH_INT_MASK(x) (((x) & 0x1) << 18)
34#define G_000040_DISPLAY_INT_STATUS(x) (((x) >> 0) & 0x1) 34#define G_000040_SCRATCH_INT_MASK(x) (((x) >> 18) & 0x1)
35#define C_000040_DISPLAY_INT_STATUS 0xFFFFFFFE 35#define C_000040_SCRATCH_INT_MASK 0xFFFBFFFF
36#define S_000040_DMA_VIPH0_INT_EN(x) (((x) & 0x1) << 12) 36#define S_000040_GUI_IDLE_MASK(x) (((x) & 0x1) << 19)
37#define G_000040_DMA_VIPH0_INT_EN(x) (((x) >> 12) & 0x1) 37#define G_000040_GUI_IDLE_MASK(x) (((x) >> 19) & 0x1)
38#define C_000040_DMA_VIPH0_INT_EN 0xFFFFEFFF 38#define C_000040_GUI_IDLE_MASK 0xFFF7FFFF
39#define S_000040_CRTC2_VSYNC(x) (((x) & 0x1) << 6)
40#define G_000040_CRTC2_VSYNC(x) (((x) >> 6) & 0x1)
41#define C_000040_CRTC2_VSYNC 0xFFFFFFBF
42#define S_000040_SNAPSHOT2(x) (((x) & 0x1) << 7)
43#define G_000040_SNAPSHOT2(x) (((x) >> 7) & 0x1)
44#define C_000040_SNAPSHOT2 0xFFFFFF7F
45#define S_000040_CRTC2_VBLANK(x) (((x) & 0x1) << 9)
46#define G_000040_CRTC2_VBLANK(x) (((x) >> 9) & 0x1)
47#define C_000040_CRTC2_VBLANK 0xFFFFFDFF
48#define S_000040_FP2_DETECT(x) (((x) & 0x1) << 10)
49#define G_000040_FP2_DETECT(x) (((x) >> 10) & 0x1)
50#define C_000040_FP2_DETECT 0xFFFFFBFF
51#define S_000040_VSYNC_DIFF_OVER_LIMIT(x) (((x) & 0x1) << 11)
52#define G_000040_VSYNC_DIFF_OVER_LIMIT(x) (((x) >> 11) & 0x1)
53#define C_000040_VSYNC_DIFF_OVER_LIMIT 0xFFFFF7FF
54#define S_000040_DMA_VIPH1_INT_EN(x) (((x) & 0x1) << 13) 39#define S_000040_DMA_VIPH1_INT_EN(x) (((x) & 0x1) << 13)
55#define G_000040_DMA_VIPH1_INT_EN(x) (((x) >> 13) & 0x1) 40#define G_000040_DMA_VIPH1_INT_EN(x) (((x) >> 13) & 0x1)
56#define C_000040_DMA_VIPH1_INT_EN 0xFFFFDFFF 41#define C_000040_DMA_VIPH1_INT_EN 0xFFFFDFFF
@@ -370,7 +355,90 @@
370#define S_007EDC_LB_D2_VBLANK_INTERRUPT(x) (((x) & 0x1) << 5) 355#define S_007EDC_LB_D2_VBLANK_INTERRUPT(x) (((x) & 0x1) << 5)
371#define G_007EDC_LB_D2_VBLANK_INTERRUPT(x) (((x) >> 5) & 0x1) 356#define G_007EDC_LB_D2_VBLANK_INTERRUPT(x) (((x) >> 5) & 0x1)
372#define C_007EDC_LB_D2_VBLANK_INTERRUPT 0xFFFFFFDF 357#define C_007EDC_LB_D2_VBLANK_INTERRUPT 0xFFFFFFDF
373 358#define S_007EDC_DACA_AUTODETECT_INTERRUPT(x) (((x) & 0x1) << 16)
359#define G_007EDC_DACA_AUTODETECT_INTERRUPT(x) (((x) >> 16) & 0x1)
360#define C_007EDC_DACA_AUTODETECT_INTERRUPT 0xFFFEFFFF
361#define S_007EDC_DACB_AUTODETECT_INTERRUPT(x) (((x) & 0x1) << 17)
362#define G_007EDC_DACB_AUTODETECT_INTERRUPT(x) (((x) >> 17) & 0x1)
363#define C_007EDC_DACB_AUTODETECT_INTERRUPT 0xFFFDFFFF
364#define S_007EDC_DC_HOT_PLUG_DETECT1_INTERRUPT(x) (((x) & 0x1) << 18)
365#define G_007EDC_DC_HOT_PLUG_DETECT1_INTERRUPT(x) (((x) >> 18) & 0x1)
366#define C_007EDC_DC_HOT_PLUG_DETECT1_INTERRUPT 0xFFFBFFFF
367#define S_007EDC_DC_HOT_PLUG_DETECT2_INTERRUPT(x) (((x) & 0x1) << 19)
368#define G_007EDC_DC_HOT_PLUG_DETECT2_INTERRUPT(x) (((x) >> 19) & 0x1)
369#define C_007EDC_DC_HOT_PLUG_DETECT2_INTERRUPT 0xFFF7FFFF
370#define R_007828_DACA_AUTODETECT_CONTROL 0x007828
371#define S_007828_DACA_AUTODETECT_MODE(x) (((x) & 0x3) << 0)
372#define G_007828_DACA_AUTODETECT_MODE(x) (((x) >> 0) & 0x3)
373#define C_007828_DACA_AUTODETECT_MODE 0xFFFFFFFC
374#define S_007828_DACA_AUTODETECT_FRAME_TIME_COUNTER(x) (((x) & 0xff) << 8)
375#define G_007828_DACA_AUTODETECT_FRAME_TIME_COUNTER(x) (((x) >> 8) & 0xff)
376#define C_007828_DACA_AUTODETECT_FRAME_TIME_COUNTER 0xFFFF00FF
377#define S_007828_DACA_AUTODETECT_CHECK_MASK(x) (((x) & 0x3) << 16)
378#define G_007828_DACA_AUTODETECT_CHECK_MASK(x) (((x) >> 16) & 0x3)
379#define C_007828_DACA_AUTODETECT_CHECK_MASK 0xFFFCFFFF
380#define R_007838_DACA_AUTODETECT_INT_CONTROL 0x007838
381#define S_007838_DACA_AUTODETECT_ACK(x) (((x) & 0x1) << 0)
382#define C_007838_DACA_DACA_AUTODETECT_ACK 0xFFFFFFFE
383#define S_007838_DACA_AUTODETECT_INT_ENABLE(x) (((x) & 0x1) << 16)
384#define G_007838_DACA_AUTODETECT_INT_ENABLE(x) (((x) >> 16) & 0x1)
385#define C_007838_DACA_AUTODETECT_INT_ENABLE 0xFFFCFFFF
386#define R_007A28_DACB_AUTODETECT_CONTROL 0x007A28
387#define S_007A28_DACB_AUTODETECT_MODE(x) (((x) & 0x3) << 0)
388#define G_007A28_DACB_AUTODETECT_MODE(x) (((x) >> 0) & 0x3)
389#define C_007A28_DACB_AUTODETECT_MODE 0xFFFFFFFC
390#define S_007A28_DACB_AUTODETECT_FRAME_TIME_COUNTER(x) (((x) & 0xff) << 8)
391#define G_007A28_DACB_AUTODETECT_FRAME_TIME_COUNTER(x) (((x) >> 8) & 0xff)
392#define C_007A28_DACB_AUTODETECT_FRAME_TIME_COUNTER 0xFFFF00FF
393#define S_007A28_DACB_AUTODETECT_CHECK_MASK(x) (((x) & 0x3) << 16)
394#define G_007A28_DACB_AUTODETECT_CHECK_MASK(x) (((x) >> 16) & 0x3)
395#define C_007A28_DACB_AUTODETECT_CHECK_MASK 0xFFFCFFFF
396#define R_007A38_DACB_AUTODETECT_INT_CONTROL 0x007A38
397#define S_007A38_DACB_AUTODETECT_ACK(x) (((x) & 0x1) << 0)
398#define C_007A38_DACB_DACA_AUTODETECT_ACK 0xFFFFFFFE
399#define S_007A38_DACB_AUTODETECT_INT_ENABLE(x) (((x) & 0x1) << 16)
400#define G_007A38_DACB_AUTODETECT_INT_ENABLE(x) (((x) >> 16) & 0x1)
401#define C_007A38_DACB_AUTODETECT_INT_ENABLE 0xFFFCFFFF
402#define R_007D00_DC_HOT_PLUG_DETECT1_CONTROL 0x007D00
403#define S_007D00_DC_HOT_PLUG_DETECT1_EN(x) (((x) & 0x1) << 0)
404#define G_007D00_DC_HOT_PLUG_DETECT1_EN(x) (((x) >> 0) & 0x1)
405#define C_007D00_DC_HOT_PLUG_DETECT1_EN 0xFFFFFFFE
406#define R_007D04_DC_HOT_PLUG_DETECT1_INT_STATUS 0x007D04
407#define S_007D04_DC_HOT_PLUG_DETECT1_INT_STATUS(x) (((x) & 0x1) << 0)
408#define G_007D04_DC_HOT_PLUG_DETECT1_INT_STATUS(x) (((x) >> 0) & 0x1)
409#define C_007D04_DC_HOT_PLUG_DETECT1_INT_STATUS 0xFFFFFFFE
410#define S_007D04_DC_HOT_PLUG_DETECT1_SENSE(x) (((x) & 0x1) << 1)
411#define G_007D04_DC_HOT_PLUG_DETECT1_SENSE(x) (((x) >> 1) & 0x1)
412#define C_007D04_DC_HOT_PLUG_DETECT1_SENSE 0xFFFFFFFD
413#define R_007D08_DC_HOT_PLUG_DETECT1_INT_CONTROL 0x007D08
414#define S_007D08_DC_HOT_PLUG_DETECT1_INT_ACK(x) (((x) & 0x1) << 0)
415#define C_007D08_DC_HOT_PLUG_DETECT1_INT_ACK 0xFFFFFFFE
416#define S_007D08_DC_HOT_PLUG_DETECT1_INT_POLARITY(x) (((x) & 0x1) << 8)
417#define G_007D08_DC_HOT_PLUG_DETECT1_INT_POLARITY(x) (((x) >> 8) & 0x1)
418#define C_007D08_DC_HOT_PLUG_DETECT1_INT_POLARITY 0xFFFFFEFF
419#define S_007D08_DC_HOT_PLUG_DETECT1_INT_EN(x) (((x) & 0x1) << 16)
420#define G_007D08_DC_HOT_PLUG_DETECT1_INT_EN(x) (((x) >> 16) & 0x1)
421#define C_007D08_DC_HOT_PLUG_DETECT1_INT_EN 0xFFFEFFFF
422#define R_007D10_DC_HOT_PLUG_DETECT2_CONTROL 0x007D10
423#define S_007D10_DC_HOT_PLUG_DETECT2_EN(x) (((x) & 0x1) << 0)
424#define G_007D10_DC_HOT_PLUG_DETECT2_EN(x) (((x) >> 0) & 0x1)
425#define C_007D10_DC_HOT_PLUG_DETECT2_EN 0xFFFFFFFE
426#define R_007D14_DC_HOT_PLUG_DETECT2_INT_STATUS 0x007D14
427#define S_007D14_DC_HOT_PLUG_DETECT2_INT_STATUS(x) (((x) & 0x1) << 0)
428#define G_007D14_DC_HOT_PLUG_DETECT2_INT_STATUS(x) (((x) >> 0) & 0x1)
429#define C_007D14_DC_HOT_PLUG_DETECT2_INT_STATUS 0xFFFFFFFE
430#define S_007D14_DC_HOT_PLUG_DETECT2_SENSE(x) (((x) & 0x1) << 1)
431#define G_007D14_DC_HOT_PLUG_DETECT2_SENSE(x) (((x) >> 1) & 0x1)
432#define C_007D14_DC_HOT_PLUG_DETECT2_SENSE 0xFFFFFFFD
433#define R_007D18_DC_HOT_PLUG_DETECT2_INT_CONTROL 0x007D18
434#define S_007D18_DC_HOT_PLUG_DETECT2_INT_ACK(x) (((x) & 0x1) << 0)
435#define C_007D18_DC_HOT_PLUG_DETECT2_INT_ACK 0xFFFFFFFE
436#define S_007D18_DC_HOT_PLUG_DETECT2_INT_POLARITY(x) (((x) & 0x1) << 8)
437#define G_007D18_DC_HOT_PLUG_DETECT2_INT_POLARITY(x) (((x) >> 8) & 0x1)
438#define C_007D18_DC_HOT_PLUG_DETECT2_INT_POLARITY 0xFFFFFEFF
439#define S_007D18_DC_HOT_PLUG_DETECT2_INT_EN(x) (((x) & 0x1) << 16)
440#define G_007D18_DC_HOT_PLUG_DETECT2_INT_EN(x) (((x) >> 16) & 0x1)
441#define C_007D18_DC_HOT_PLUG_DETECT2_INT_EN 0xFFFEFFFF
374 442
375/* MC registers */ 443/* MC registers */
376#define R_000000_MC_STATUS 0x000000 444#define R_000000_MC_STATUS 0x000000