drm/radeon/kms: force pinning buffer into visible VRAM

This patch properly set visible VRAM and enforce any pinned buffer
to be into visible VRAM. We might later add a flag to release this
constraint for some newer hw more clever than previous.

Signed-off-by: Jerome Glisse <jglisse@redhat.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>

1 files changed, 3 insertions, 2 deletions

diff --git a/drivers/gpu/drm/radeon/rs600.c b/drivers/gpu/drm/radeon/rs600.c
index d5aeb2a31d59..47f046b78c6b 100644
--- a/drivers/gpu/drm/radeon/rs600.c
+++ b/drivers/gpu/drm/radeon/rs600.c
@@ -462,12 +462,13 @@ void rs600_mc_init(struct radeon_device *rdev)
 {
         u64 base;
 
+        rdev->mc.aper_base = drm_get_resource_start(rdev->ddev, 0);
+        rdev->mc.aper_size = drm_get_resource_len(rdev->ddev, 0);
         rdev->mc.vram_is_ddr = true;
         rdev->mc.vram_width = 128;
         rdev->mc.real_vram_size = RREG32(RADEON_CONFIG_MEMSIZE);
         rdev->mc.mc_vram_size = rdev->mc.real_vram_size;
-        rdev->mc.aper_base = drm_get_resource_start(rdev->ddev, 0);
-        rdev->mc.aper_size = drm_get_resource_len(rdev->ddev, 0);
+        rdev->mc.visible_vram_size = rdev->mc.aper_size;
         rdev->mc.igp_sideport_enabled = radeon_atombios_sideport_present(rdev);
         base = RREG32_MC(R_000004_MC_FB_LOCATION);
         base = G_000004_MC_FB_START(base) << 16;