drm/radeon/kms: add support for multiple fence queues v2

For supporting multiple CP ring buffers, async DMA
engines and UVD.  We still need a way to synchronize
between engines.

v2 initialize unused fence driver ring to avoid issue in
   suspend/unload

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Christian König <deathsimple@vodafone.de>
Reviewed-by: Jerome Glisse <jglisse@redhat.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>

1 files changed, 2 insertions, 2 deletions

diff --git a/drivers/gpu/drm/radeon/rs600.c b/drivers/gpu/drm/radeon/rs600.c
index b1053d640423..1c9ab9409531 100644
--- a/drivers/gpu/drm/radeon/rs600.c
+++ b/drivers/gpu/drm/radeon/rs600.c
@@ -642,7 +642,7 @@ int rs600_irq_process(struct radeon_device *rdev)
         while (status || rdev->irq.stat_regs.r500.disp_int) {
                 /* SW interrupt */
                 if (G_000044_SW_INT(status)) {
-                        radeon_fence_process(rdev);
+                        radeon_fence_process(rdev, RADEON_RING_TYPE_GFX_INDEX);
                 }
                 /* GUI idle */
                 if (G_000040_GUI_IDLE(status)) {
@@ -962,7 +962,7 @@ int rs600_init(struct radeon_device *rdev)
         rs600_mc_init(rdev);
         rs600_debugfs(rdev);
         /* Fence driver */
-        r = radeon_fence_driver_init(rdev);
+        r = radeon_fence_driver_init(rdev, 1);
         if (r)
                 return r;
         r = radeon_irq_kms_init(rdev);