diff options
author | Alex Deucher <alexander.deucher@amd.com> | 2013-06-26 00:33:35 -0400 |
---|---|---|
committer | Alex Deucher <alexander.deucher@amd.com> | 2013-06-27 19:15:22 -0400 |
commit | dc50ba7f9a6d9a920409892c7f30bce266067345 (patch) | |
tree | 17e9dc618117ceacf39c2f2e29907792cdedc598 /drivers/gpu/drm/radeon/radeon_ucode.h | |
parent | 66229b200598a3b66b839d1759ff3f5b17ac5639 (diff) |
drm/radeon/kms: add dpm support for evergreen (v4)
This adds dpm support for evergreen asics. This includes:
- clockgating
- dynamic engine clock scaling
- dynamic memory clock scaling
- dynamic voltage scaling
- dynamic pcie gen1/gen2 switching (requires additional acpi support)
Set radeon.dpm=1 to enable.
v2: reduce stack usage, rename ulv struct
v3: fix thermal interrupt check notices by Jerome
v4: fix state enable
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Diffstat (limited to 'drivers/gpu/drm/radeon/radeon_ucode.h')
-rw-r--r-- | drivers/gpu/drm/radeon/radeon_ucode.h | 20 |
1 files changed, 20 insertions, 0 deletions
diff --git a/drivers/gpu/drm/radeon/radeon_ucode.h b/drivers/gpu/drm/radeon/radeon_ucode.h index 19105455330d..cb9c8135875d 100644 --- a/drivers/gpu/drm/radeon/radeon_ucode.h +++ b/drivers/gpu/drm/radeon/radeon_ucode.h | |||
@@ -65,4 +65,24 @@ | |||
65 | #define RV740_SMC_INT_VECTOR_START 0xffc0 | 65 | #define RV740_SMC_INT_VECTOR_START 0xffc0 |
66 | #define RV740_SMC_INT_VECTOR_SIZE 0x0040 | 66 | #define RV740_SMC_INT_VECTOR_SIZE 0x0040 |
67 | 67 | ||
68 | #define CEDAR_SMC_UCODE_START 0x0100 | ||
69 | #define CEDAR_SMC_UCODE_SIZE 0x5d50 | ||
70 | #define CEDAR_SMC_INT_VECTOR_START 0xffc0 | ||
71 | #define CEDAR_SMC_INT_VECTOR_SIZE 0x0040 | ||
72 | |||
73 | #define REDWOOD_SMC_UCODE_START 0x0100 | ||
74 | #define REDWOOD_SMC_UCODE_SIZE 0x5f0a | ||
75 | #define REDWOOD_SMC_INT_VECTOR_START 0xffc0 | ||
76 | #define REDWOOD_SMC_INT_VECTOR_SIZE 0x0040 | ||
77 | |||
78 | #define JUNIPER_SMC_UCODE_START 0x0100 | ||
79 | #define JUNIPER_SMC_UCODE_SIZE 0x5f1f | ||
80 | #define JUNIPER_SMC_INT_VECTOR_START 0xffc0 | ||
81 | #define JUNIPER_SMC_INT_VECTOR_SIZE 0x0040 | ||
82 | |||
83 | #define CYPRESS_SMC_UCODE_START 0x0100 | ||
84 | #define CYPRESS_SMC_UCODE_SIZE 0x61f7 | ||
85 | #define CYPRESS_SMC_INT_VECTOR_START 0xffc0 | ||
86 | #define CYPRESS_SMC_INT_VECTOR_SIZE 0x0040 | ||
87 | |||
68 | #endif | 88 | #endif |