diff options
author | Alex Deucher <alexdeucher@gmail.com> | 2009-02-24 16:22:29 -0500 |
---|---|---|
committer | Dave Airlie <airlied@redhat.com> | 2009-03-13 00:24:11 -0400 |
commit | c05ce0834a268f7d18274847190f6ed826b99332 (patch) | |
tree | b9980946e7e5cb72abf20c88c3f84db93af9c281 /drivers/gpu/drm/radeon/radeon_state.c | |
parent | 80b3334a4d5c163ab35c560a21d2cdc39bb5d3f8 (diff) |
drm/radeon: add initial support for R6xx/R7xx GPUs
This adds support for 2D/Xv acceleration in the X.org 2D driver,
to the drm. It doesn't yet provide any 3D support hooks.
Signed-off-by: Alex Deucher <alexdeucher@gmail.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
Diffstat (limited to 'drivers/gpu/drm/radeon/radeon_state.c')
-rw-r--r-- | drivers/gpu/drm/radeon/radeon_state.c | 42 |
1 files changed, 26 insertions, 16 deletions
diff --git a/drivers/gpu/drm/radeon/radeon_state.c b/drivers/gpu/drm/radeon/radeon_state.c index 043293ae6e48..ca00cef4502d 100644 --- a/drivers/gpu/drm/radeon/radeon_state.c +++ b/drivers/gpu/drm/radeon/radeon_state.c | |||
@@ -1556,9 +1556,15 @@ static void radeon_cp_discard_buffer(struct drm_device *dev, struct drm_master * | |||
1556 | buf_priv->age = ++master_priv->sarea_priv->last_dispatch; | 1556 | buf_priv->age = ++master_priv->sarea_priv->last_dispatch; |
1557 | 1557 | ||
1558 | /* Emit the vertex buffer age */ | 1558 | /* Emit the vertex buffer age */ |
1559 | BEGIN_RING(2); | 1559 | if ((dev_priv->flags & RADEON_FAMILY_MASK) >= CHIP_R600) { |
1560 | RADEON_DISPATCH_AGE(buf_priv->age); | 1560 | BEGIN_RING(3); |
1561 | ADVANCE_RING(); | 1561 | R600_DISPATCH_AGE(buf_priv->age); |
1562 | ADVANCE_RING(); | ||
1563 | } else { | ||
1564 | BEGIN_RING(2); | ||
1565 | RADEON_DISPATCH_AGE(buf_priv->age); | ||
1566 | ADVANCE_RING(); | ||
1567 | } | ||
1562 | 1568 | ||
1563 | buf->pending = 1; | 1569 | buf->pending = 1; |
1564 | buf->used = 0; | 1570 | buf->used = 0; |
@@ -2473,24 +2479,25 @@ static int radeon_cp_indirect(struct drm_device *dev, void *data, struct drm_fil | |||
2473 | 2479 | ||
2474 | buf->used = indirect->end; | 2480 | buf->used = indirect->end; |
2475 | 2481 | ||
2476 | /* Wait for the 3D stream to idle before the indirect buffer | ||
2477 | * containing 2D acceleration commands is processed. | ||
2478 | */ | ||
2479 | BEGIN_RING(2); | ||
2480 | |||
2481 | RADEON_WAIT_UNTIL_3D_IDLE(); | ||
2482 | |||
2483 | ADVANCE_RING(); | ||
2484 | |||
2485 | /* Dispatch the indirect buffer full of commands from the | 2482 | /* Dispatch the indirect buffer full of commands from the |
2486 | * X server. This is insecure and is thus only available to | 2483 | * X server. This is insecure and is thus only available to |
2487 | * privileged clients. | 2484 | * privileged clients. |
2488 | */ | 2485 | */ |
2489 | radeon_cp_dispatch_indirect(dev, buf, indirect->start, indirect->end); | 2486 | if ((dev_priv->flags & RADEON_FAMILY_MASK) >= CHIP_R600) |
2490 | if (indirect->discard) { | 2487 | r600_cp_dispatch_indirect(dev, buf, indirect->start, indirect->end); |
2491 | radeon_cp_discard_buffer(dev, file_priv->master, buf); | 2488 | else { |
2489 | /* Wait for the 3D stream to idle before the indirect buffer | ||
2490 | * containing 2D acceleration commands is processed. | ||
2491 | */ | ||
2492 | BEGIN_RING(2); | ||
2493 | RADEON_WAIT_UNTIL_3D_IDLE(); | ||
2494 | ADVANCE_RING(); | ||
2495 | radeon_cp_dispatch_indirect(dev, buf, indirect->start, indirect->end); | ||
2492 | } | 2496 | } |
2493 | 2497 | ||
2498 | if (indirect->discard) | ||
2499 | radeon_cp_discard_buffer(dev, file_priv->master, buf); | ||
2500 | |||
2494 | COMMIT_RING(); | 2501 | COMMIT_RING(); |
2495 | return 0; | 2502 | return 0; |
2496 | } | 2503 | } |
@@ -3052,7 +3059,10 @@ static int radeon_cp_getparam(struct drm_device *dev, void *data, struct drm_fil | |||
3052 | case RADEON_PARAM_SCRATCH_OFFSET: | 3059 | case RADEON_PARAM_SCRATCH_OFFSET: |
3053 | if (!dev_priv->writeback_works) | 3060 | if (!dev_priv->writeback_works) |
3054 | return -EINVAL; | 3061 | return -EINVAL; |
3055 | value = RADEON_SCRATCH_REG_OFFSET; | 3062 | if ((dev_priv->flags & RADEON_FAMILY_MASK) >= CHIP_R600) |
3063 | value = R600_SCRATCH_REG_OFFSET; | ||
3064 | else | ||
3065 | value = RADEON_SCRATCH_REG_OFFSET; | ||
3056 | break; | 3066 | break; |
3057 | case RADEON_PARAM_CARD_TYPE: | 3067 | case RADEON_PARAM_CARD_TYPE: |
3058 | if (dev_priv->flags & RADEON_IS_PCIE) | 3068 | if (dev_priv->flags & RADEON_IS_PCIE) |