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author | Dmitry Torokhov <dmitry.torokhov@gmail.com> | 2009-12-03 02:38:13 -0500 |
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committer | Dmitry Torokhov <dmitry.torokhov@gmail.com> | 2009-12-03 02:38:13 -0500 |
commit | 467832032cc07626880363efa8625719c16c04eb (patch) | |
tree | ee9a62c04f0b3106e412bc1b2dd1cea5566d5ca7 /drivers/gpu/drm/radeon/radeon_reg.h | |
parent | 66d2a5952eab875f1286e04f738ef029afdaf013 (diff) | |
parent | 22763c5cf3690a681551162c15d34d935308c8d7 (diff) |
Merge commit 'v2.6.32' into next
Diffstat (limited to 'drivers/gpu/drm/radeon/radeon_reg.h')
-rw-r--r-- | drivers/gpu/drm/radeon/radeon_reg.h | 6 |
1 files changed, 6 insertions, 0 deletions
diff --git a/drivers/gpu/drm/radeon/radeon_reg.h b/drivers/gpu/drm/radeon/radeon_reg.h index bfa1ab9c93e1..29ab75903ec1 100644 --- a/drivers/gpu/drm/radeon/radeon_reg.h +++ b/drivers/gpu/drm/radeon/radeon_reg.h | |||
@@ -290,6 +290,8 @@ | |||
290 | #define RADEON_BUS_CNTL 0x0030 | 290 | #define RADEON_BUS_CNTL 0x0030 |
291 | # define RADEON_BUS_MASTER_DIS (1 << 6) | 291 | # define RADEON_BUS_MASTER_DIS (1 << 6) |
292 | # define RADEON_BUS_BIOS_DIS_ROM (1 << 12) | 292 | # define RADEON_BUS_BIOS_DIS_ROM (1 << 12) |
293 | # define RS600_BUS_MASTER_DIS (1 << 14) | ||
294 | # define RS600_MSI_REARM (1 << 20) /* rs600/rs690/rs740 */ | ||
293 | # define RADEON_BUS_RD_DISCARD_EN (1 << 24) | 295 | # define RADEON_BUS_RD_DISCARD_EN (1 << 24) |
294 | # define RADEON_BUS_RD_ABORT_EN (1 << 25) | 296 | # define RADEON_BUS_RD_ABORT_EN (1 << 25) |
295 | # define RADEON_BUS_MSTR_DISCONNECT_EN (1 << 28) | 297 | # define RADEON_BUS_MSTR_DISCONNECT_EN (1 << 28) |
@@ -297,6 +299,9 @@ | |||
297 | # define RADEON_BUS_READ_BURST (1 << 30) | 299 | # define RADEON_BUS_READ_BURST (1 << 30) |
298 | #define RADEON_BUS_CNTL1 0x0034 | 300 | #define RADEON_BUS_CNTL1 0x0034 |
299 | # define RADEON_BUS_WAIT_ON_LOCK_EN (1 << 4) | 301 | # define RADEON_BUS_WAIT_ON_LOCK_EN (1 << 4) |
302 | /* rv370/rv380, rv410, r423/r430/r480, r5xx */ | ||
303 | #define RADEON_MSI_REARM_EN 0x0160 | ||
304 | # define RV370_MSI_REARM_EN (1 << 0) | ||
300 | 305 | ||
301 | /* #define RADEON_PCIE_INDEX 0x0030 */ | 306 | /* #define RADEON_PCIE_INDEX 0x0030 */ |
302 | /* #define RADEON_PCIE_DATA 0x0034 */ | 307 | /* #define RADEON_PCIE_DATA 0x0034 */ |
@@ -3311,6 +3316,7 @@ | |||
3311 | #define RADEON_AIC_CNTL 0x01d0 | 3316 | #define RADEON_AIC_CNTL 0x01d0 |
3312 | # define RADEON_PCIGART_TRANSLATE_EN (1 << 0) | 3317 | # define RADEON_PCIGART_TRANSLATE_EN (1 << 0) |
3313 | # define RADEON_DIS_OUT_OF_PCI_GART_ACCESS (1 << 1) | 3318 | # define RADEON_DIS_OUT_OF_PCI_GART_ACCESS (1 << 1) |
3319 | # define RS400_MSI_REARM (1 << 3) /* rs400/rs480 */ | ||
3314 | #define RADEON_AIC_LO_ADDR 0x01dc | 3320 | #define RADEON_AIC_LO_ADDR 0x01dc |
3315 | #define RADEON_AIC_PT_BASE 0x01d8 | 3321 | #define RADEON_AIC_PT_BASE 0x01d8 |
3316 | #define RADEON_AIC_HI_ADDR 0x01e0 | 3322 | #define RADEON_AIC_HI_ADDR 0x01e0 |