diff options
author | Dave Airlie <airlied@redhat.com> | 2009-08-13 02:32:14 -0400 |
---|---|---|
committer | Dave Airlie <airlied@redhat.com> | 2009-09-07 19:24:37 -0400 |
commit | 4ce001abafafe77e5dd943d1480fc9f87894e96f (patch) | |
tree | 4a22b42c58a80450992fcf5d7625b19fe045855b /drivers/gpu/drm/radeon/radeon_mode.h | |
parent | 551ebd837c75fc75df81811a18b7136c39cab487 (diff) |
drm/radeon/kms: add initial radeon tv-out support.
This ports the tv-out code from the DDX to KMS.
adds a radeon.tv module option, radeon.tv=0 to disable tv
Signed-off-by: Dave Airlie <airlied@redhat.com>
Diffstat (limited to 'drivers/gpu/drm/radeon/radeon_mode.h')
-rw-r--r-- | drivers/gpu/drm/radeon/radeon_mode.h | 50 |
1 files changed, 46 insertions, 4 deletions
diff --git a/drivers/gpu/drm/radeon/radeon_mode.h b/drivers/gpu/drm/radeon/radeon_mode.h index 20e9509a7130..523d6cbd4f08 100644 --- a/drivers/gpu/drm/radeon/radeon_mode.h +++ b/drivers/gpu/drm/radeon/radeon_mode.h | |||
@@ -188,6 +188,21 @@ struct radeon_native_mode { | |||
188 | uint32_t flags; | 188 | uint32_t flags; |
189 | }; | 189 | }; |
190 | 190 | ||
191 | #define MAX_H_CODE_TIMING_LEN 32 | ||
192 | #define MAX_V_CODE_TIMING_LEN 32 | ||
193 | |||
194 | /* need to store these as reading | ||
195 | back code tables is excessive */ | ||
196 | struct radeon_tv_regs { | ||
197 | uint32_t tv_uv_adr; | ||
198 | uint32_t timing_cntl; | ||
199 | uint32_t hrestart; | ||
200 | uint32_t vrestart; | ||
201 | uint32_t frestart; | ||
202 | uint16_t h_code_timing[MAX_H_CODE_TIMING_LEN]; | ||
203 | uint16_t v_code_timing[MAX_V_CODE_TIMING_LEN]; | ||
204 | }; | ||
205 | |||
191 | struct radeon_crtc { | 206 | struct radeon_crtc { |
192 | struct drm_crtc base; | 207 | struct drm_crtc base; |
193 | int crtc_id; | 208 | int crtc_id; |
@@ -202,7 +217,6 @@ struct radeon_crtc { | |||
202 | uint32_t legacy_display_base_addr; | 217 | uint32_t legacy_display_base_addr; |
203 | uint32_t legacy_cursor_offset; | 218 | uint32_t legacy_cursor_offset; |
204 | enum radeon_rmx_type rmx_type; | 219 | enum radeon_rmx_type rmx_type; |
205 | uint32_t devices; | ||
206 | fixed20_12 vsc; | 220 | fixed20_12 vsc; |
207 | fixed20_12 hsc; | 221 | fixed20_12 hsc; |
208 | struct radeon_native_mode native_mode; | 222 | struct radeon_native_mode native_mode; |
@@ -234,7 +248,13 @@ struct radeon_encoder_tv_dac { | |||
234 | uint32_t ntsc_tvdac_adj; | 248 | uint32_t ntsc_tvdac_adj; |
235 | uint32_t pal_tvdac_adj; | 249 | uint32_t pal_tvdac_adj; |
236 | 250 | ||
251 | int h_pos; | ||
252 | int v_pos; | ||
253 | int h_size; | ||
254 | int supported_tv_stds; | ||
255 | bool tv_on; | ||
237 | enum radeon_tv_std tv_std; | 256 | enum radeon_tv_std tv_std; |
257 | struct radeon_tv_regs tv; | ||
238 | }; | 258 | }; |
239 | 259 | ||
240 | struct radeon_encoder_int_tmds { | 260 | struct radeon_encoder_int_tmds { |
@@ -253,10 +273,15 @@ struct radeon_encoder_atom_dig { | |||
253 | struct radeon_native_mode native_mode; | 273 | struct radeon_native_mode native_mode; |
254 | }; | 274 | }; |
255 | 275 | ||
276 | struct radeon_encoder_atom_dac { | ||
277 | enum radeon_tv_std tv_std; | ||
278 | }; | ||
279 | |||
256 | struct radeon_encoder { | 280 | struct radeon_encoder { |
257 | struct drm_encoder base; | 281 | struct drm_encoder base; |
258 | uint32_t encoder_id; | 282 | uint32_t encoder_id; |
259 | uint32_t devices; | 283 | uint32_t devices; |
284 | uint32_t active_device; | ||
260 | uint32_t flags; | 285 | uint32_t flags; |
261 | uint32_t pixel_clock; | 286 | uint32_t pixel_clock; |
262 | enum radeon_rmx_type rmx_type; | 287 | enum radeon_rmx_type rmx_type; |
@@ -274,7 +299,10 @@ struct radeon_connector { | |||
274 | uint32_t connector_id; | 299 | uint32_t connector_id; |
275 | uint32_t devices; | 300 | uint32_t devices; |
276 | struct radeon_i2c_chan *ddc_bus; | 301 | struct radeon_i2c_chan *ddc_bus; |
277 | int use_digital; | 302 | bool use_digital; |
303 | /* we need to mind the EDID between detect | ||
304 | and get modes due to analog/digital/tvencoder */ | ||
305 | struct edid *edid; | ||
278 | void *con_priv; | 306 | void *con_priv; |
279 | }; | 307 | }; |
280 | 308 | ||
@@ -308,6 +336,7 @@ struct drm_encoder *radeon_encoder_legacy_tmds_int_add(struct drm_device *dev, i | |||
308 | struct drm_encoder *radeon_encoder_legacy_tmds_ext_add(struct drm_device *dev, int bios_index); | 336 | struct drm_encoder *radeon_encoder_legacy_tmds_ext_add(struct drm_device *dev, int bios_index); |
309 | extern void atombios_external_tmds_setup(struct drm_encoder *encoder, int action); | 337 | extern void atombios_external_tmds_setup(struct drm_encoder *encoder, int action); |
310 | extern int atombios_get_encoder_mode(struct drm_encoder *encoder); | 338 | extern int atombios_get_encoder_mode(struct drm_encoder *encoder); |
339 | extern void radeon_encoder_set_active_device(struct drm_encoder *encoder); | ||
311 | 340 | ||
312 | extern void radeon_crtc_load_lut(struct drm_crtc *crtc); | 341 | extern void radeon_crtc_load_lut(struct drm_crtc *crtc); |
313 | extern int atombios_crtc_set_base(struct drm_crtc *crtc, int x, int y, | 342 | extern int atombios_crtc_set_base(struct drm_crtc *crtc, int x, int y, |
@@ -394,6 +423,19 @@ extern int radeon_static_clocks_init(struct drm_device *dev); | |||
394 | bool radeon_crtc_scaling_mode_fixup(struct drm_crtc *crtc, | 423 | bool radeon_crtc_scaling_mode_fixup(struct drm_crtc *crtc, |
395 | struct drm_display_mode *mode, | 424 | struct drm_display_mode *mode, |
396 | struct drm_display_mode *adjusted_mode); | 425 | struct drm_display_mode *adjusted_mode); |
397 | void atom_rv515_force_tv_scaler(struct radeon_device *rdev); | 426 | void atom_rv515_force_tv_scaler(struct radeon_device *rdev, struct radeon_crtc *radeon_crtc); |
398 | 427 | ||
428 | /* legacy tv */ | ||
429 | void radeon_legacy_tv_adjust_crtc_reg(struct drm_encoder *encoder, | ||
430 | uint32_t *h_total_disp, uint32_t *h_sync_strt_wid, | ||
431 | uint32_t *v_total_disp, uint32_t *v_sync_strt_wid); | ||
432 | void radeon_legacy_tv_adjust_pll1(struct drm_encoder *encoder, | ||
433 | uint32_t *htotal_cntl, uint32_t *ppll_ref_div, | ||
434 | uint32_t *ppll_div_3, uint32_t *pixclks_cntl); | ||
435 | void radeon_legacy_tv_adjust_pll2(struct drm_encoder *encoder, | ||
436 | uint32_t *htotal2_cntl, uint32_t *p2pll_ref_div, | ||
437 | uint32_t *p2pll_div_0, uint32_t *pixclks_cntl); | ||
438 | void radeon_legacy_tv_mode_set(struct drm_encoder *encoder, | ||
439 | struct drm_display_mode *mode, | ||
440 | struct drm_display_mode *adjusted_mode); | ||
399 | #endif | 441 | #endif |