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authorDavid Miller <davem@davemloft.net>2009-02-12 05:15:37 -0500
committerDave Airlie <airlied@redhat.com>2009-03-13 00:24:00 -0400
commitb07fa022ecf1e04fd0623877affe9e10bf45ac86 (patch)
tree59d17e4b898db739701552030519ca7e0004ab6c /drivers/gpu/drm/radeon/radeon_drv.h
parent296c6ae0e9b5ced1060b43a68b5f7e41a18509f6 (diff)
drm: radeon: Fix ring_rptr accesses.
The memory behind ring_rptr can either be in ioremapped memory or a vmalloc() normal kernel memory buffer. However, the code unconditionally uses DRM_{READ,WRITE}32() (and thus readl() and writel()) to access it. Basically, if RADEON_IS_AGP then it's ioremap()'d memory else it's vmalloc'd memory. Adjust all of the ring_rptr access code as needed. While we're here, kill the 'scratch' pointer in drm_radeon_private. It's only used in the one place where it is initialized. Signed-off-by: David S. Miller <davem@davemloft.net> Signed-off-by: Dave Airlie <airlied@linux.ie>
Diffstat (limited to 'drivers/gpu/drm/radeon/radeon_drv.h')
-rw-r--r--drivers/gpu/drm/radeon/radeon_drv.h17
1 files changed, 9 insertions, 8 deletions
diff --git a/drivers/gpu/drm/radeon/radeon_drv.h b/drivers/gpu/drm/radeon/radeon_drv.h
index c608e22f73f9..a253cf071ec4 100644
--- a/drivers/gpu/drm/radeon/radeon_drv.h
+++ b/drivers/gpu/drm/radeon/radeon_drv.h
@@ -160,10 +160,6 @@ enum radeon_chip_flags {
160 RADEON_IS_IGPGART = 0x01000000UL, 160 RADEON_IS_IGPGART = 0x01000000UL,
161}; 161};
162 162
163#define GET_RING_HEAD(dev_priv) (dev_priv->writeback_works ? \
164 DRM_READ32( (dev_priv)->ring_rptr, 0 ) : RADEON_READ(RADEON_CP_RB_RPTR))
165#define SET_RING_HEAD(dev_priv,val) DRM_WRITE32( (dev_priv)->ring_rptr, 0, (val) )
166
167typedef struct drm_radeon_freelist { 163typedef struct drm_radeon_freelist {
168 unsigned int age; 164 unsigned int age;
169 struct drm_buf *buf; 165 struct drm_buf *buf;
@@ -248,7 +244,6 @@ typedef struct drm_radeon_private {
248 drm_radeon_freelist_t *head; 244 drm_radeon_freelist_t *head;
249 drm_radeon_freelist_t *tail; 245 drm_radeon_freelist_t *tail;
250 int last_buf; 246 int last_buf;
251 volatile u32 *scratch;
252 int writeback_works; 247 int writeback_works;
253 248
254 int usec_timeout; 249 int usec_timeout;
@@ -338,6 +333,12 @@ extern int radeon_no_wb;
338extern struct drm_ioctl_desc radeon_ioctls[]; 333extern struct drm_ioctl_desc radeon_ioctls[];
339extern int radeon_max_ioctl; 334extern int radeon_max_ioctl;
340 335
336extern u32 radeon_get_ring_head(drm_radeon_private_t *dev_priv);
337extern void radeon_set_ring_head(drm_radeon_private_t *dev_priv, u32 val);
338
339#define GET_RING_HEAD(dev_priv) radeon_get_ring_head(dev_priv)
340#define SET_RING_HEAD(dev_priv, val) radeon_set_ring_head(dev_priv, val)
341
341/* Check whether the given hardware address is inside the framebuffer or the 342/* Check whether the given hardware address is inside the framebuffer or the
342 * GART area. 343 * GART area.
343 */ 344 */
@@ -639,9 +640,9 @@ extern int r300_do_cp_cmdbuf(struct drm_device *dev,
639 640
640#define RADEON_SCRATCHOFF( x ) (RADEON_SCRATCH_REG_OFFSET + 4*(x)) 641#define RADEON_SCRATCHOFF( x ) (RADEON_SCRATCH_REG_OFFSET + 4*(x))
641 642
642#define GET_SCRATCH( x ) (dev_priv->writeback_works \ 643extern u32 radeon_get_scratch(drm_radeon_private_t *dev_priv, int index);
643 ? DRM_READ32( dev_priv->ring_rptr, RADEON_SCRATCHOFF(x) ) \ 644
644 : RADEON_READ( RADEON_SCRATCH_REG0 + 4*(x) ) ) 645#define GET_SCRATCH(dev_priv, x) radeon_get_scratch(dev_priv, x)
645 646
646#define RADEON_GEN_INT_CNTL 0x0040 647#define RADEON_GEN_INT_CNTL 0x0040
647# define RADEON_CRTC_VBLANK_MASK (1 << 0) 648# define RADEON_CRTC_VBLANK_MASK (1 << 0)