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authorAlex Deucher <alexdeucher@gmail.com>2008-10-27 17:48:34 -0400
committerDave Airlie <airlied@redhat.com>2008-10-27 17:48:34 -0400
commit4e270e9b8a9d246290f3901f1fb6c5efdb734ddf (patch)
tree5fd42dd52d6268ef8f91e4fd5f388d2c506b1dce /drivers/gpu/drm/radeon/radeon_drv.h
parent65e082c9a33a6e9f24e9a713a7d38d11206d3c3d (diff)
drm/radeon: fixup further bus mastering confusion.
rs400/480 are like previous chips not like rs6xx chips. Signed-off-by: Dave Airlie <airlied@redhat.com>
Diffstat (limited to 'drivers/gpu/drm/radeon/radeon_drv.h')
-rw-r--r--drivers/gpu/drm/radeon/radeon_drv.h12
1 files changed, 6 insertions, 6 deletions
diff --git a/drivers/gpu/drm/radeon/radeon_drv.h b/drivers/gpu/drm/radeon/radeon_drv.h
index 4dbb813910c3..02f5575ba395 100644
--- a/drivers/gpu/drm/radeon/radeon_drv.h
+++ b/drivers/gpu/drm/radeon/radeon_drv.h
@@ -447,12 +447,12 @@ extern int r300_do_cp_cmdbuf(struct drm_device *dev,
447 * handling, not bus mastering itself. 447 * handling, not bus mastering itself.
448 */ 448 */
449#define RADEON_BUS_CNTL 0x0030 449#define RADEON_BUS_CNTL 0x0030
450/* r1xx, r2xx, r300, r(v)350, r420/r481, rs480 */ 450/* r1xx, r2xx, r300, r(v)350, r420/r481, rs400/rs480 */
451# define RADEON_BUS_MASTER_DIS (1 << 6) 451# define RADEON_BUS_MASTER_DIS (1 << 6)
452/* rs400, rs690/rs740 */ 452/* rs600/rs690/rs740 */
453# define RS400_BUS_MASTER_DIS (1 << 14) 453# define RS600_BUS_MASTER_DIS (1 << 14)
454# define RS400_MSI_REARM (1 << 20) 454# define RS600_MSI_REARM (1 << 20)
455/* see RS480_MSI_REARM in AIC_CNTL for rs480 */ 455/* see RS400_MSI_REARM in AIC_CNTL for rs480 */
456 456
457#define RADEON_BUS_CNTL1 0x0034 457#define RADEON_BUS_CNTL1 0x0034
458# define RADEON_PMI_BM_DIS (1 << 2) 458# define RADEON_PMI_BM_DIS (1 << 2)
@@ -937,7 +937,7 @@ extern int r300_do_cp_cmdbuf(struct drm_device *dev,
937 937
938#define RADEON_AIC_CNTL 0x01d0 938#define RADEON_AIC_CNTL 0x01d0
939# define RADEON_PCIGART_TRANSLATE_EN (1 << 0) 939# define RADEON_PCIGART_TRANSLATE_EN (1 << 0)
940# define RS480_MSI_REARM (1 << 3) 940# define RS400_MSI_REARM (1 << 3)
941#define RADEON_AIC_STAT 0x01d4 941#define RADEON_AIC_STAT 0x01d4
942#define RADEON_AIC_PT_BASE 0x01d8 942#define RADEON_AIC_PT_BASE 0x01d8
943#define RADEON_AIC_LO_ADDR 0x01dc 943#define RADEON_AIC_LO_ADDR 0x01dc