diff options
author | Alex Deucher <alexdeucher@gmail.com> | 2009-03-06 11:47:54 -0500 |
---|---|---|
committer | Dave Airlie <airlied@redhat.com> | 2009-03-13 00:24:16 -0400 |
commit | 800b69951174f7de294da575d7e7921041a7e783 (patch) | |
tree | cb6208891d5d661e87fe5fde57313ea0b6531f1f /drivers/gpu/drm/radeon/radeon_drv.c | |
parent | a7d13ad0e2c1b0572492fd53ca1a090794e2f8e2 (diff) |
drm/radeon: RS600: fix interrupt handling
the checks weren't updated when RS600 support
was added.
Signed-off-by: Alex Deucher <alexdeucher@gmail.com>
Signed-off-by: Dave Airlie <airlied@linux.ie>
Diffstat (limited to 'drivers/gpu/drm/radeon/radeon_drv.c')
-rw-r--r-- | drivers/gpu/drm/radeon/radeon_drv.c | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/drivers/gpu/drm/radeon/radeon_drv.c b/drivers/gpu/drm/radeon/radeon_drv.c index 1e3b2557a51a..2cb4f32b81d4 100644 --- a/drivers/gpu/drm/radeon/radeon_drv.c +++ b/drivers/gpu/drm/radeon/radeon_drv.c | |||
@@ -46,7 +46,7 @@ static int radeon_suspend(struct drm_device *dev, pm_message_t state) | |||
46 | drm_radeon_private_t *dev_priv = dev->dev_private; | 46 | drm_radeon_private_t *dev_priv = dev->dev_private; |
47 | 47 | ||
48 | /* Disable *all* interrupts */ | 48 | /* Disable *all* interrupts */ |
49 | if ((dev_priv->flags & RADEON_FAMILY_MASK) >= CHIP_RS690) | 49 | if ((dev_priv->flags & RADEON_FAMILY_MASK) >= CHIP_RS600) |
50 | RADEON_WRITE(R500_DxMODE_INT_MASK, 0); | 50 | RADEON_WRITE(R500_DxMODE_INT_MASK, 0); |
51 | RADEON_WRITE(RADEON_GEN_INT_CNTL, 0); | 51 | RADEON_WRITE(RADEON_GEN_INT_CNTL, 0); |
52 | return 0; | 52 | return 0; |
@@ -57,7 +57,7 @@ static int radeon_resume(struct drm_device *dev) | |||
57 | drm_radeon_private_t *dev_priv = dev->dev_private; | 57 | drm_radeon_private_t *dev_priv = dev->dev_private; |
58 | 58 | ||
59 | /* Restore interrupt registers */ | 59 | /* Restore interrupt registers */ |
60 | if ((dev_priv->flags & RADEON_FAMILY_MASK) >= CHIP_RS690) | 60 | if ((dev_priv->flags & RADEON_FAMILY_MASK) >= CHIP_RS600) |
61 | RADEON_WRITE(R500_DxMODE_INT_MASK, dev_priv->r500_disp_irq_reg); | 61 | RADEON_WRITE(R500_DxMODE_INT_MASK, dev_priv->r500_disp_irq_reg); |
62 | RADEON_WRITE(RADEON_GEN_INT_CNTL, dev_priv->irq_enable_reg); | 62 | RADEON_WRITE(RADEON_GEN_INT_CNTL, dev_priv->irq_enable_reg); |
63 | return 0; | 63 | return 0; |