drm/radeon: adapt to PCI BAR changes on CIK

register BAR is now at PCI BAR 5.

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

1 files changed, 7 insertions, 2 deletions

diff --git a/drivers/gpu/drm/radeon/radeon_device.c b/drivers/gpu/drm/radeon/radeon_device.c
index c24056b4af7b..4e97ff79b7f0 100644
--- a/drivers/gpu/drm/radeon/radeon_device.c
+++ b/drivers/gpu/drm/radeon/radeon_device.c
@@ -1148,8 +1148,13 @@ int radeon_device_init(struct radeon_device *rdev,
         /* Registers mapping */
         /* TODO: block userspace mapping of io register */
         spin_lock_init(&rdev->mmio_idx_lock);
-        rdev->rmmio_base = pci_resource_start(rdev->pdev, 2);
-        rdev->rmmio_size = pci_resource_len(rdev->pdev, 2);
+        if (rdev->family >= CHIP_BONAIRE) {
+                rdev->rmmio_base = pci_resource_start(rdev->pdev, 5);
+                rdev->rmmio_size = pci_resource_len(rdev->pdev, 5);
+        } else {
+                rdev->rmmio_base = pci_resource_start(rdev->pdev, 2);
+                rdev->rmmio_size = pci_resource_len(rdev->pdev, 2);
+        }
         rdev->rmmio = ioremap(rdev->rmmio_base, rdev->rmmio_size);
         if (rdev->rmmio == NULL) {
                 return -ENOMEM;