aboutsummaryrefslogtreecommitdiffstats
path: root/drivers/gpu/drm/radeon/radeon_device.c
diff options
context:
space:
mode:
authorJerome Glisse <jglisse@redhat.com>2009-09-14 12:29:49 -0400
committerDave Airlie <airlied@redhat.com>2009-09-14 18:53:14 -0400
commit4aac047323e3082d0866b8ad3784236632105af4 (patch)
treeaf4c118e42b9ea55c961c4f5bbb02998dc2cc4fe /drivers/gpu/drm/radeon/radeon_device.c
parent21f9a437222e92adb3abc68584a5f04801b92739 (diff)
drm/radeon/kms: clear confusion in GART init/deinit path
GART static one time initialization was mixed up with GART enabling/disabling which could happen several time for instance during suspend/resume cycles. This patch splits all GART handling into 4 differents function. gart_init is for one time initialization, gart_deinit is called upon module unload to free resources allocated by gart_init, gart_enable enable the GART and is intented to be call after first initialization and at each resume cycle or reset cycle. Finaly gart_disable stop the GART and is intended to be call at suspend time or when unloading the module. Signed-off-by: Jerome Glisse <jglisse@redhat.com> Signed-off-by: Dave Airlie <airlied@redhat.com>
Diffstat (limited to 'drivers/gpu/drm/radeon/radeon_device.c')
-rw-r--r--drivers/gpu/drm/radeon/radeon_device.c36
1 files changed, 30 insertions, 6 deletions
diff --git a/drivers/gpu/drm/radeon/radeon_device.c b/drivers/gpu/drm/radeon/radeon_device.c
index ece097c3e079..7b6d0b1a5962 100644
--- a/drivers/gpu/drm/radeon/radeon_device.c
+++ b/drivers/gpu/drm/radeon/radeon_device.c
@@ -320,6 +320,14 @@ int radeon_asic_init(struct radeon_device *rdev)
320 case CHIP_RV350: 320 case CHIP_RV350:
321 case CHIP_RV380: 321 case CHIP_RV380:
322 rdev->asic = &r300_asic; 322 rdev->asic = &r300_asic;
323 if (rdev->flags & RADEON_IS_PCIE) {
324 rdev->asic->gart_init = &rv370_pcie_gart_init;
325 rdev->asic->gart_fini = &rv370_pcie_gart_fini;
326 rdev->asic->gart_enable = &rv370_pcie_gart_enable;
327 rdev->asic->gart_disable = &rv370_pcie_gart_disable;
328 rdev->asic->gart_tlb_flush = &rv370_pcie_gart_tlb_flush;
329 rdev->asic->gart_set_page = &rv370_pcie_gart_set_page;
330 }
323 break; 331 break;
324 case CHIP_R420: 332 case CHIP_R420:
325 case CHIP_R423: 333 case CHIP_R423:
@@ -504,6 +512,12 @@ int radeon_device_init(struct radeon_device *rdev,
504 rwlock_init(&rdev->fence_drv.lock); 512 rwlock_init(&rdev->fence_drv.lock);
505 INIT_LIST_HEAD(&rdev->gem.objects); 513 INIT_LIST_HEAD(&rdev->gem.objects);
506 514
515 /* Set asic functions */
516 r = radeon_asic_init(rdev);
517 if (r) {
518 return r;
519 }
520
507 if (radeon_agpmode == -1) { 521 if (radeon_agpmode == -1) {
508 rdev->flags &= ~RADEON_IS_AGP; 522 rdev->flags &= ~RADEON_IS_AGP;
509 if (rdev->family >= CHIP_RV515 || 523 if (rdev->family >= CHIP_RV515 ||
@@ -512,18 +526,24 @@ int radeon_device_init(struct radeon_device *rdev,
512 rdev->family == CHIP_R423) { 526 rdev->family == CHIP_R423) {
513 DRM_INFO("Forcing AGP to PCIE mode\n"); 527 DRM_INFO("Forcing AGP to PCIE mode\n");
514 rdev->flags |= RADEON_IS_PCIE; 528 rdev->flags |= RADEON_IS_PCIE;
529 rdev->asic->gart_init = &rv370_pcie_gart_init;
530 rdev->asic->gart_fini = &rv370_pcie_gart_fini;
531 rdev->asic->gart_enable = &rv370_pcie_gart_enable;
532 rdev->asic->gart_disable = &rv370_pcie_gart_disable;
533 rdev->asic->gart_tlb_flush = &rv370_pcie_gart_tlb_flush;
534 rdev->asic->gart_set_page = &rv370_pcie_gart_set_page;
515 } else { 535 } else {
516 DRM_INFO("Forcing AGP to PCI mode\n"); 536 DRM_INFO("Forcing AGP to PCI mode\n");
517 rdev->flags |= RADEON_IS_PCI; 537 rdev->flags |= RADEON_IS_PCI;
538 rdev->asic->gart_init = &r100_pci_gart_init;
539 rdev->asic->gart_fini = &r100_pci_gart_fini;
540 rdev->asic->gart_enable = &r100_pci_gart_enable;
541 rdev->asic->gart_disable = &r100_pci_gart_disable;
542 rdev->asic->gart_tlb_flush = &r100_pci_gart_tlb_flush;
543 rdev->asic->gart_set_page = &r100_pci_gart_set_page;
518 } 544 }
519 } 545 }
520 546
521 /* Set asic functions */
522 r = radeon_asic_init(rdev);
523 if (r) {
524 return r;
525 }
526
527 /* set DMA mask + need_dma32 flags. 547 /* set DMA mask + need_dma32 flags.
528 * PCIE - can handle 40-bits. 548 * PCIE - can handle 40-bits.
529 * IGP - can handle 40-bits (in theory) 549 * IGP - can handle 40-bits (in theory)
@@ -623,6 +643,9 @@ int radeon_device_init(struct radeon_device *rdev,
623 if (r) { 643 if (r) {
624 return r; 644 return r;
625 } 645 }
646 r = radeon_gpu_gart_init(rdev);
647 if (r)
648 return r;
626 /* Initialize GART (initialize after TTM so we can allocate 649 /* Initialize GART (initialize after TTM so we can allocate
627 * memory through TTM but finalize after TTM) */ 650 * memory through TTM but finalize after TTM) */
628 r = radeon_gart_enable(rdev); 651 r = radeon_gart_enable(rdev);
@@ -675,6 +698,7 @@ void radeon_device_fini(struct radeon_device *rdev)
675 radeon_ib_pool_fini(rdev); 698 radeon_ib_pool_fini(rdev);
676 radeon_cp_fini(rdev); 699 radeon_cp_fini(rdev);
677 radeon_wb_fini(rdev); 700 radeon_wb_fini(rdev);
701 radeon_gpu_gart_fini(rdev);
678 radeon_gem_fini(rdev); 702 radeon_gem_fini(rdev);
679 radeon_mc_fini(rdev); 703 radeon_mc_fini(rdev);
680#if __OS_HAS_AGP 704#if __OS_HAS_AGP