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authorAlex Deucher <alexdeucher@gmail.com>2010-07-15 10:51:10 -0400
committerDave Airlie <airlied@redhat.com>2010-07-15 21:27:01 -0400
commit8d369bb196f1f9111cb7ab839d4f420378fa7b30 (patch)
tree50fab6e264572f10b5635581789532d3962d54c9 /drivers/gpu/drm/radeon/radeon_device.c
parent5099fa7f23d3711538cbe9fe072b4ce1ba814035 (diff)
drm/radeon/kms: fix gtt MC base alignment on rs4xx/rs690/rs740 asics
The asics in question have the following requirements with regard to their gart setups: 1. The GART aperture size has to be in the form of 2^X bytes, where X is from 25 to 31 2. The GART aperture MC base has to be aligned to a boundary equal to the size of the aperture. 3. The GART page table has to be aligned to the boundary equal to the size of the table. 4. The GART page table size is: table_entry_size * (aperture_size / page_size) 5. The GART page table has to be allocated in non-paged, non-cached, contiguous system memory. This patch takes care 2. The rest should already be handled properly. This fixes a regression noticed by: Torsten Kaiser <just.for.lkml@googlemail.com> Tested-by: Torsten Kaiser <just.for.lkml@googlemail.com> Signed-off-by: Alex Deucher <alexdeucher@gmail.com> Signed-off-by: Dave Airlie <airlied@redhat.com>
Diffstat (limited to 'drivers/gpu/drm/radeon/radeon_device.c')
-rw-r--r--drivers/gpu/drm/radeon/radeon_device.c8
1 files changed, 4 insertions, 4 deletions
diff --git a/drivers/gpu/drm/radeon/radeon_device.c b/drivers/gpu/drm/radeon/radeon_device.c
index 5f317317aba2..dd279da90546 100644
--- a/drivers/gpu/drm/radeon/radeon_device.c
+++ b/drivers/gpu/drm/radeon/radeon_device.c
@@ -226,20 +226,20 @@ void radeon_gtt_location(struct radeon_device *rdev, struct radeon_mc *mc)
226{ 226{
227 u64 size_af, size_bf; 227 u64 size_af, size_bf;
228 228
229 size_af = 0xFFFFFFFF - mc->vram_end; 229 size_af = ((0xFFFFFFFF - mc->vram_end) + mc->gtt_base_align) & ~mc->gtt_base_align;
230 size_bf = mc->vram_start; 230 size_bf = mc->vram_start & ~mc->gtt_base_align;
231 if (size_bf > size_af) { 231 if (size_bf > size_af) {
232 if (mc->gtt_size > size_bf) { 232 if (mc->gtt_size > size_bf) {
233 dev_warn(rdev->dev, "limiting GTT\n"); 233 dev_warn(rdev->dev, "limiting GTT\n");
234 mc->gtt_size = size_bf; 234 mc->gtt_size = size_bf;
235 } 235 }
236 mc->gtt_start = mc->vram_start - mc->gtt_size; 236 mc->gtt_start = (mc->vram_start & ~mc->gtt_base_align) - mc->gtt_size;
237 } else { 237 } else {
238 if (mc->gtt_size > size_af) { 238 if (mc->gtt_size > size_af) {
239 dev_warn(rdev->dev, "limiting GTT\n"); 239 dev_warn(rdev->dev, "limiting GTT\n");
240 mc->gtt_size = size_af; 240 mc->gtt_size = size_af;
241 } 241 }
242 mc->gtt_start = mc->vram_end + 1; 242 mc->gtt_start = (mc->vram_end + 1 + mc->gtt_base_align) & ~mc->gtt_base_align;
243 } 243 }
244 mc->gtt_end = mc->gtt_start + mc->gtt_size - 1; 244 mc->gtt_end = mc->gtt_start + mc->gtt_size - 1;
245 dev_info(rdev->dev, "GTT: %lluM 0x%08llX - 0x%08llX\n", 245 dev_info(rdev->dev, "GTT: %lluM 0x%08llX - 0x%08llX\n",