drm/radeon: make indirect register access concurrency-safe

With the new per-crtc locking mutliple set-cursor calls could happen
in parallel. Out of sheer paranoia I've opted for an irqsave spinlock.
But if there's indeed an access from interrupt contexts to these regs
it's already broken with the old code, so this can likely just be
reduced to a normal spinlock. Otoh the pageflip completion happens
from the vblank irq handler ...

Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

1 files changed, 1 insertions, 0 deletions

diff --git a/drivers/gpu/drm/radeon/radeon_device.c b/drivers/gpu/drm/radeon/radeon_device.c
index e2f5f888c374..49b06590001e 100644
--- a/drivers/gpu/drm/radeon/radeon_device.c
+++ b/drivers/gpu/drm/radeon/radeon_device.c
@@ -1059,6 +1059,7 @@ int radeon_device_init(struct radeon_device *rdev,
 
         /* Registers mapping */
         /* TODO: block userspace mapping of io register */
+        spin_lock_init(&rdev->mmio_idx_lock);
         rdev->rmmio_base = pci_resource_start(rdev->pdev, 2);
         rdev->rmmio_size = pci_resource_len(rdev->pdev, 2);
         rdev->rmmio = ioremap(rdev->rmmio_base, rdev->rmmio_size);