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authorAlex Deucher <alexdeucher@gmail.com>2009-12-04 16:35:57 -0500
committerDave Airlie <airlied@redhat.com>2009-12-07 17:53:25 -0500
commit2a008d0ccde4ce59a2714e132d5f86a0771e6422 (patch)
tree51eabe644466b3601d77ebd8497e44e747acc981 /drivers/gpu/drm/radeon/radeon_clocks.c
parent92cde00cbaf3236ef7ea9bd4f0b43c8c4a3f507f (diff)
drm/radeon/kms: more r4xx lvds fixes
Grab pll ref div from regs at driver init. r4xx seems very picky about the dividers for the pll driving lvds. Signed-off-by: Alex Deucher <alexdeucher@gmail.com> Signed-off-by: Dave Airlie <airlied@redhat.com>
Diffstat (limited to 'drivers/gpu/drm/radeon/radeon_clocks.c')
-rw-r--r--drivers/gpu/drm/radeon/radeon_clocks.c15
1 files changed, 13 insertions, 2 deletions
diff --git a/drivers/gpu/drm/radeon/radeon_clocks.c b/drivers/gpu/drm/radeon/radeon_clocks.c
index 2c541e08f160..b062109efbee 100644
--- a/drivers/gpu/drm/radeon/radeon_clocks.c
+++ b/drivers/gpu/drm/radeon/radeon_clocks.c
@@ -106,8 +106,19 @@ void radeon_get_clock_info(struct drm_device *dev)
106 ret = radeon_combios_get_clock_info(dev); 106 ret = radeon_combios_get_clock_info(dev);
107 107
108 if (ret) { 108 if (ret) {
109 if (p1pll->reference_div < 2) 109 if (p1pll->reference_div < 2) {
110 p1pll->reference_div = 12; 110 if (!ASIC_IS_AVIVO(rdev)) {
111 u32 tmp = RREG32_PLL(RADEON_PPLL_REF_DIV);
112 if (ASIC_IS_R300(rdev))
113 p1pll->reference_div =
114 (tmp & R300_PPLL_REF_DIV_ACC_MASK) >> R300_PPLL_REF_DIV_ACC_SHIFT;
115 else
116 p1pll->reference_div = tmp & RADEON_PPLL_REF_DIV_MASK;
117 if (p1pll->reference_div < 2)
118 p1pll->reference_div = 12;
119 } else
120 p1pll->reference_div = 12;
121 }
111 if (p2pll->reference_div < 2) 122 if (p2pll->reference_div < 2)
112 p2pll->reference_div = 12; 123 p2pll->reference_div = 12;
113 if (rdev->family < CHIP_RS600) { 124 if (rdev->family < CHIP_RS600) {