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authorGreg Kroah-Hartman <gregkh@linuxfoundation.org>2013-05-26 21:40:19 -0400
committerGreg Kroah-Hartman <gregkh@linuxfoundation.org>2013-05-26 21:40:19 -0400
commitf35c69b736e4f910d7447346980145212c283570 (patch)
tree824b90cd870e6de07bbba19d761c1c74cf1fb4a7 /drivers/gpu/drm/radeon/radeon_bios.c
parentcd4373984a5903276f52777a6003425e023eaa7e (diff)
parente4aa937ec75df0eea0bee03bffa3303ad36c986b (diff)
Merge 3.10-rc3 into char-misc-next
We want the changes in here. Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Diffstat (limited to 'drivers/gpu/drm/radeon/radeon_bios.c')
-rw-r--r--drivers/gpu/drm/radeon/radeon_bios.c28
1 files changed, 16 insertions, 12 deletions
diff --git a/drivers/gpu/drm/radeon/radeon_bios.c b/drivers/gpu/drm/radeon/radeon_bios.c
index fa3c56fba294..061b227dae0c 100644
--- a/drivers/gpu/drm/radeon/radeon_bios.c
+++ b/drivers/gpu/drm/radeon/radeon_bios.c
@@ -244,24 +244,28 @@ static bool ni_read_disabled_bios(struct radeon_device *rdev)
244 244
245 /* enable the rom */ 245 /* enable the rom */
246 WREG32(R600_BUS_CNTL, (bus_cntl & ~R600_BIOS_ROM_DIS)); 246 WREG32(R600_BUS_CNTL, (bus_cntl & ~R600_BIOS_ROM_DIS));
247 /* Disable VGA mode */ 247 if (!ASIC_IS_NODCE(rdev)) {
248 WREG32(AVIVO_D1VGA_CONTROL, 248 /* Disable VGA mode */
249 (d1vga_control & ~(AVIVO_DVGA_CONTROL_MODE_ENABLE | 249 WREG32(AVIVO_D1VGA_CONTROL,
250 AVIVO_DVGA_CONTROL_TIMING_SELECT))); 250 (d1vga_control & ~(AVIVO_DVGA_CONTROL_MODE_ENABLE |
251 WREG32(AVIVO_D2VGA_CONTROL, 251 AVIVO_DVGA_CONTROL_TIMING_SELECT)));
252 (d2vga_control & ~(AVIVO_DVGA_CONTROL_MODE_ENABLE | 252 WREG32(AVIVO_D2VGA_CONTROL,
253 AVIVO_DVGA_CONTROL_TIMING_SELECT))); 253 (d2vga_control & ~(AVIVO_DVGA_CONTROL_MODE_ENABLE |
254 WREG32(AVIVO_VGA_RENDER_CONTROL, 254 AVIVO_DVGA_CONTROL_TIMING_SELECT)));
255 (vga_render_control & ~AVIVO_VGA_VSTATUS_CNTL_MASK)); 255 WREG32(AVIVO_VGA_RENDER_CONTROL,
256 (vga_render_control & ~AVIVO_VGA_VSTATUS_CNTL_MASK));
257 }
256 WREG32(R600_ROM_CNTL, rom_cntl | R600_SCK_OVERWRITE); 258 WREG32(R600_ROM_CNTL, rom_cntl | R600_SCK_OVERWRITE);
257 259
258 r = radeon_read_bios(rdev); 260 r = radeon_read_bios(rdev);
259 261
260 /* restore regs */ 262 /* restore regs */
261 WREG32(R600_BUS_CNTL, bus_cntl); 263 WREG32(R600_BUS_CNTL, bus_cntl);
262 WREG32(AVIVO_D1VGA_CONTROL, d1vga_control); 264 if (!ASIC_IS_NODCE(rdev)) {
263 WREG32(AVIVO_D2VGA_CONTROL, d2vga_control); 265 WREG32(AVIVO_D1VGA_CONTROL, d1vga_control);
264 WREG32(AVIVO_VGA_RENDER_CONTROL, vga_render_control); 266 WREG32(AVIVO_D2VGA_CONTROL, d2vga_control);
267 WREG32(AVIVO_VGA_RENDER_CONTROL, vga_render_control);
268 }
265 WREG32(R600_ROM_CNTL, rom_cntl); 269 WREG32(R600_ROM_CNTL, rom_cntl);
266 return r; 270 return r;
267} 271}