diff options
author | Alex Deucher <alexdeucher@gmail.com> | 2010-11-08 11:08:29 -0500 |
---|---|---|
committer | Dave Airlie <airlied@redhat.com> | 2010-11-08 22:43:32 -0500 |
commit | fb939dfcf2a3a70357000617799925b6a11f9348 (patch) | |
tree | 7b307b6edbd6e6c6f7b8a93a9fc95e1d87abcc8f /drivers/gpu/drm/radeon/radeon_atombios.c | |
parent | dccb2a952b1f0b51978fcb3f9899c7f46ffd4b28 (diff) |
drm/radeon/kms: add support for clock/data path routers
This is a follow on to:
26b5bc986423cf3887e09188cb662ed651c5374d
(drm/radeon/kms: add support for router objects)
That patch added support for systems that use a mux to control
the ddc line routing between the connectors. This patch adds
support for systems that use a mux to control the encoder
clock and data path routing to the connectors.
Should fix:
https://bugs.freedesktop.org/show_bug.cgi?id=31339
Signed-off-by: Alex Deucher <alexdeucher@gmail.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
Diffstat (limited to 'drivers/gpu/drm/radeon/radeon_atombios.c')
-rw-r--r-- | drivers/gpu/drm/radeon/radeon_atombios.c | 26 |
1 files changed, 19 insertions, 7 deletions
diff --git a/drivers/gpu/drm/radeon/radeon_atombios.c b/drivers/gpu/drm/radeon/radeon_atombios.c index 04cac7ec9039..a1de975eec30 100644 --- a/drivers/gpu/drm/radeon/radeon_atombios.c +++ b/drivers/gpu/drm/radeon/radeon_atombios.c | |||
@@ -526,7 +526,8 @@ bool radeon_get_atom_connector_info_from_object_table(struct drm_device *dev) | |||
526 | if (crev < 2) | 526 | if (crev < 2) |
527 | return false; | 527 | return false; |
528 | 528 | ||
529 | router.valid = false; | 529 | router.ddc_valid = false; |
530 | router.cd_valid = false; | ||
530 | 531 | ||
531 | obj_header = (ATOM_OBJECT_HEADER *) (ctx->bios + data_offset); | 532 | obj_header = (ATOM_OBJECT_HEADER *) (ctx->bios + data_offset); |
532 | path_obj = (ATOM_DISPLAY_OBJECT_PATH_TABLE *) | 533 | path_obj = (ATOM_DISPLAY_OBJECT_PATH_TABLE *) |
@@ -647,7 +648,8 @@ bool radeon_get_atom_connector_info_from_object_table(struct drm_device *dev) | |||
647 | usDeviceTag)); | 648 | usDeviceTag)); |
648 | 649 | ||
649 | } else if (grph_obj_type == GRAPH_OBJECT_TYPE_ROUTER) { | 650 | } else if (grph_obj_type == GRAPH_OBJECT_TYPE_ROUTER) { |
650 | router.valid = false; | 651 | router.ddc_valid = false; |
652 | router.cd_valid = false; | ||
651 | for (k = 0; k < router_obj->ucNumberOfObjects; k++) { | 653 | for (k = 0; k < router_obj->ucNumberOfObjects; k++) { |
652 | u16 router_obj_id = le16_to_cpu(router_obj->asObjects[j].usObjectID); | 654 | u16 router_obj_id = le16_to_cpu(router_obj->asObjects[j].usObjectID); |
653 | if (le16_to_cpu(path->usGraphicObjIds[j]) == router_obj_id) { | 655 | if (le16_to_cpu(path->usGraphicObjIds[j]) == router_obj_id) { |
@@ -657,6 +659,7 @@ bool radeon_get_atom_connector_info_from_object_table(struct drm_device *dev) | |||
657 | ATOM_I2C_RECORD *i2c_record; | 659 | ATOM_I2C_RECORD *i2c_record; |
658 | ATOM_I2C_ID_CONFIG_ACCESS *i2c_config; | 660 | ATOM_I2C_ID_CONFIG_ACCESS *i2c_config; |
659 | ATOM_ROUTER_DDC_PATH_SELECT_RECORD *ddc_path; | 661 | ATOM_ROUTER_DDC_PATH_SELECT_RECORD *ddc_path; |
662 | ATOM_ROUTER_DATA_CLOCK_PATH_SELECT_RECORD *cd_path; | ||
660 | ATOM_SRC_DST_TABLE_FOR_ONE_OBJECT *router_src_dst_table = | 663 | ATOM_SRC_DST_TABLE_FOR_ONE_OBJECT *router_src_dst_table = |
661 | (ATOM_SRC_DST_TABLE_FOR_ONE_OBJECT *) | 664 | (ATOM_SRC_DST_TABLE_FOR_ONE_OBJECT *) |
662 | (ctx->bios + data_offset + | 665 | (ctx->bios + data_offset + |
@@ -690,10 +693,18 @@ bool radeon_get_atom_connector_info_from_object_table(struct drm_device *dev) | |||
690 | case ATOM_ROUTER_DDC_PATH_SELECT_RECORD_TYPE: | 693 | case ATOM_ROUTER_DDC_PATH_SELECT_RECORD_TYPE: |
691 | ddc_path = (ATOM_ROUTER_DDC_PATH_SELECT_RECORD *) | 694 | ddc_path = (ATOM_ROUTER_DDC_PATH_SELECT_RECORD *) |
692 | record; | 695 | record; |
693 | router.valid = true; | 696 | router.ddc_valid = true; |
694 | router.mux_type = ddc_path->ucMuxType; | 697 | router.ddc_mux_type = ddc_path->ucMuxType; |
695 | router.mux_control_pin = ddc_path->ucMuxControlPin; | 698 | router.ddc_mux_control_pin = ddc_path->ucMuxControlPin; |
696 | router.mux_state = ddc_path->ucMuxState[enum_id]; | 699 | router.ddc_mux_state = ddc_path->ucMuxState[enum_id]; |
700 | break; | ||
701 | case ATOM_ROUTER_DATA_CLOCK_PATH_SELECT_RECORD_TYPE: | ||
702 | cd_path = (ATOM_ROUTER_DATA_CLOCK_PATH_SELECT_RECORD *) | ||
703 | record; | ||
704 | router.cd_valid = true; | ||
705 | router.cd_mux_type = cd_path->ucMuxType; | ||
706 | router.cd_mux_control_pin = cd_path->ucMuxControlPin; | ||
707 | router.cd_mux_state = cd_path->ucMuxState[enum_id]; | ||
697 | break; | 708 | break; |
698 | } | 709 | } |
699 | record = (ATOM_COMMON_RECORD_HEADER *) | 710 | record = (ATOM_COMMON_RECORD_HEADER *) |
@@ -860,7 +871,8 @@ bool radeon_get_atom_connector_info_from_supported_devices_table(struct | |||
860 | size_t bc_size = sizeof(*bios_connectors) * ATOM_MAX_SUPPORTED_DEVICE; | 871 | size_t bc_size = sizeof(*bios_connectors) * ATOM_MAX_SUPPORTED_DEVICE; |
861 | struct radeon_router router; | 872 | struct radeon_router router; |
862 | 873 | ||
863 | router.valid = false; | 874 | router.ddc_valid = false; |
875 | router.cd_valid = false; | ||
864 | 876 | ||
865 | bios_connectors = kzalloc(bc_size, GFP_KERNEL); | 877 | bios_connectors = kzalloc(bc_size, GFP_KERNEL); |
866 | if (!bios_connectors) | 878 | if (!bios_connectors) |