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authorAlex Deucher <alexdeucher@gmail.com>2009-10-16 11:15:25 -0400
committerDave Airlie <airlied@redhat.com>2009-10-25 23:28:22 -0400
commitebbe1cb936dfc96d809ccf4d64a9755f8ba0c0ff (patch)
tree42c9ef8b5552c84a2e02b5e35f17bfddc28927b5 /drivers/gpu/drm/radeon/radeon_atombios.c
parentc290dadf4cac25cc91529d84004795ab43fc0821 (diff)
drm/radeon/kms/atom: add support for spread spectrum (v2)
Spread spectrum is a periodic disturbance added to the feedback divider to change the pixel clock periodically to reduce interference. Only enabled on LVDS. v2: add support for r4xx and fix DCE 3 Signed-off-by: Alex Deucher <alexdeucher@gmail.com> Signed-off-by: Dave Airlie <airlied@redhat.com>
Diffstat (limited to 'drivers/gpu/drm/radeon/radeon_atombios.c')
-rw-r--r--drivers/gpu/drm/radeon/radeon_atombios.c42
1 files changed, 42 insertions, 0 deletions
diff --git a/drivers/gpu/drm/radeon/radeon_atombios.c b/drivers/gpu/drm/radeon/radeon_atombios.c
index cec67917179f..18729259c2fc 100644
--- a/drivers/gpu/drm/radeon/radeon_atombios.c
+++ b/drivers/gpu/drm/radeon/radeon_atombios.c
@@ -771,6 +771,46 @@ bool radeon_atombios_get_tmds_info(struct radeon_encoder *encoder,
771 return false; 771 return false;
772} 772}
773 773
774static struct radeon_atom_ss *radeon_atombios_get_ss_info(struct
775 radeon_encoder
776 *encoder,
777 int id)
778{
779 struct drm_device *dev = encoder->base.dev;
780 struct radeon_device *rdev = dev->dev_private;
781 struct radeon_mode_info *mode_info = &rdev->mode_info;
782 int index = GetIndexIntoMasterTable(DATA, PPLL_SS_Info);
783 uint16_t data_offset;
784 struct _ATOM_SPREAD_SPECTRUM_INFO *ss_info;
785 uint8_t frev, crev;
786 struct radeon_atom_ss *ss = NULL;
787
788 if (id > ATOM_MAX_SS_ENTRY)
789 return NULL;
790
791 atom_parse_data_header(mode_info->atom_context, index, NULL, &frev,
792 &crev, &data_offset);
793
794 ss_info =
795 (struct _ATOM_SPREAD_SPECTRUM_INFO *)(mode_info->atom_context->bios + data_offset);
796
797 if (ss_info) {
798 ss =
799 kzalloc(sizeof(struct radeon_atom_ss), GFP_KERNEL);
800
801 if (!ss)
802 return NULL;
803
804 ss->percentage = le16_to_cpu(ss_info->asSS_Info[id].usSpreadSpectrumPercentage);
805 ss->type = ss_info->asSS_Info[id].ucSpreadSpectrumType;
806 ss->step = ss_info->asSS_Info[id].ucSS_Step;
807 ss->delay = ss_info->asSS_Info[id].ucSS_Delay;
808 ss->range = ss_info->asSS_Info[id].ucSS_Range;
809 ss->refdiv = ss_info->asSS_Info[id].ucRecommendedRef_Div;
810 }
811 return ss;
812}
813
774union lvds_info { 814union lvds_info {
775 struct _ATOM_LVDS_INFO info; 815 struct _ATOM_LVDS_INFO info;
776 struct _ATOM_LVDS_INFO_V12 info_12; 816 struct _ATOM_LVDS_INFO_V12 info_12;
@@ -826,6 +866,8 @@ struct radeon_encoder_atom_dig *radeon_atombios_get_lvds_info(struct
826 /* set crtc values */ 866 /* set crtc values */
827 drm_mode_set_crtcinfo(&lvds->native_mode, CRTC_INTERLACE_HALVE_V); 867 drm_mode_set_crtcinfo(&lvds->native_mode, CRTC_INTERLACE_HALVE_V);
828 868
869 lvds->ss = radeon_atombios_get_ss_info(encoder, lvds_info->info.ucSS_Id);
870
829 encoder->native_mode = lvds->native_mode; 871 encoder->native_mode = lvds->native_mode;
830 } 872 }
831 return lvds; 873 return lvds;