diff options
author | Alex Deucher <alexdeucher@gmail.com> | 2010-04-22 14:25:19 -0400 |
---|---|---|
committer | Dave Airlie <airlied@redhat.com> | 2010-05-18 04:21:08 -0400 |
commit | 79daedc942813c0417ff5e277da6f7f35705cde5 (patch) | |
tree | 36f08e83553eb048066fc0374da971aa8861d3ec /drivers/gpu/drm/radeon/radeon_atombios.c | |
parent | d91eeb7862a4a5f7c5c92b953fa69d2f1430e840 (diff) |
drm/radeon/kms: minor pm cleanups
- remove non_clock_info struct
- track power state misc flags
Signed-off-by: Alex Deucher <alexdeucher@gmail.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
Diffstat (limited to 'drivers/gpu/drm/radeon/radeon_atombios.c')
-rw-r--r-- | drivers/gpu/drm/radeon/radeon_atombios.c | 22 |
1 files changed, 14 insertions, 8 deletions
diff --git a/drivers/gpu/drm/radeon/radeon_atombios.c b/drivers/gpu/drm/radeon/radeon_atombios.c index a0a99b66af82..c29ac74a1d20 100644 --- a/drivers/gpu/drm/radeon/radeon_atombios.c +++ b/drivers/gpu/drm/radeon/radeon_atombios.c | |||
@@ -1528,7 +1528,7 @@ void radeon_atombios_get_power_modes(struct radeon_device *rdev) | |||
1528 | if ((rdev->pm.power_state[state_index].clock_info[0].mclk == 0) || | 1528 | if ((rdev->pm.power_state[state_index].clock_info[0].mclk == 0) || |
1529 | (rdev->pm.power_state[state_index].clock_info[0].sclk == 0)) | 1529 | (rdev->pm.power_state[state_index].clock_info[0].sclk == 0)) |
1530 | continue; | 1530 | continue; |
1531 | rdev->pm.power_state[state_index].non_clock_info.pcie_lanes = | 1531 | rdev->pm.power_state[state_index].pcie_lanes = |
1532 | power_info->info.asPowerPlayInfo[i].ucNumPciELanes; | 1532 | power_info->info.asPowerPlayInfo[i].ucNumPciELanes; |
1533 | misc = le32_to_cpu(power_info->info.asPowerPlayInfo[i].ulMiscInfo); | 1533 | misc = le32_to_cpu(power_info->info.asPowerPlayInfo[i].ulMiscInfo); |
1534 | if (misc & ATOM_PM_MISCINFO_VOLTAGE_DROP_SUPPORT) { | 1534 | if (misc & ATOM_PM_MISCINFO_VOLTAGE_DROP_SUPPORT) { |
@@ -1550,6 +1550,7 @@ void radeon_atombios_get_power_modes(struct radeon_device *rdev) | |||
1550 | power_info->info.asPowerPlayInfo[i].ucVoltageDropIndex; | 1550 | power_info->info.asPowerPlayInfo[i].ucVoltageDropIndex; |
1551 | } | 1551 | } |
1552 | rdev->pm.power_state[state_index].flags = RADEON_PM_SINGLE_DISPLAY_ONLY; | 1552 | rdev->pm.power_state[state_index].flags = RADEON_PM_SINGLE_DISPLAY_ONLY; |
1553 | rdev->pm.power_state[state_index].misc = misc; | ||
1553 | /* order matters! */ | 1554 | /* order matters! */ |
1554 | if (misc & ATOM_PM_MISCINFO_POWER_SAVING_MODE) | 1555 | if (misc & ATOM_PM_MISCINFO_POWER_SAVING_MODE) |
1555 | rdev->pm.power_state[state_index].type = | 1556 | rdev->pm.power_state[state_index].type = |
@@ -1590,7 +1591,7 @@ void radeon_atombios_get_power_modes(struct radeon_device *rdev) | |||
1590 | if ((rdev->pm.power_state[state_index].clock_info[0].mclk == 0) || | 1591 | if ((rdev->pm.power_state[state_index].clock_info[0].mclk == 0) || |
1591 | (rdev->pm.power_state[state_index].clock_info[0].sclk == 0)) | 1592 | (rdev->pm.power_state[state_index].clock_info[0].sclk == 0)) |
1592 | continue; | 1593 | continue; |
1593 | rdev->pm.power_state[state_index].non_clock_info.pcie_lanes = | 1594 | rdev->pm.power_state[state_index].pcie_lanes = |
1594 | power_info->info_2.asPowerPlayInfo[i].ucNumPciELanes; | 1595 | power_info->info_2.asPowerPlayInfo[i].ucNumPciELanes; |
1595 | misc = le32_to_cpu(power_info->info_2.asPowerPlayInfo[i].ulMiscInfo); | 1596 | misc = le32_to_cpu(power_info->info_2.asPowerPlayInfo[i].ulMiscInfo); |
1596 | misc2 = le32_to_cpu(power_info->info_2.asPowerPlayInfo[i].ulMiscInfo2); | 1597 | misc2 = le32_to_cpu(power_info->info_2.asPowerPlayInfo[i].ulMiscInfo2); |
@@ -1613,6 +1614,8 @@ void radeon_atombios_get_power_modes(struct radeon_device *rdev) | |||
1613 | power_info->info_2.asPowerPlayInfo[i].ucVoltageDropIndex; | 1614 | power_info->info_2.asPowerPlayInfo[i].ucVoltageDropIndex; |
1614 | } | 1615 | } |
1615 | rdev->pm.power_state[state_index].flags = RADEON_PM_SINGLE_DISPLAY_ONLY; | 1616 | rdev->pm.power_state[state_index].flags = RADEON_PM_SINGLE_DISPLAY_ONLY; |
1617 | rdev->pm.power_state[state_index].misc = misc; | ||
1618 | rdev->pm.power_state[state_index].misc2 = misc2; | ||
1616 | /* order matters! */ | 1619 | /* order matters! */ |
1617 | if (misc & ATOM_PM_MISCINFO_POWER_SAVING_MODE) | 1620 | if (misc & ATOM_PM_MISCINFO_POWER_SAVING_MODE) |
1618 | rdev->pm.power_state[state_index].type = | 1621 | rdev->pm.power_state[state_index].type = |
@@ -1659,7 +1662,7 @@ void radeon_atombios_get_power_modes(struct radeon_device *rdev) | |||
1659 | if ((rdev->pm.power_state[state_index].clock_info[0].mclk == 0) || | 1662 | if ((rdev->pm.power_state[state_index].clock_info[0].mclk == 0) || |
1660 | (rdev->pm.power_state[state_index].clock_info[0].sclk == 0)) | 1663 | (rdev->pm.power_state[state_index].clock_info[0].sclk == 0)) |
1661 | continue; | 1664 | continue; |
1662 | rdev->pm.power_state[state_index].non_clock_info.pcie_lanes = | 1665 | rdev->pm.power_state[state_index].pcie_lanes = |
1663 | power_info->info_3.asPowerPlayInfo[i].ucNumPciELanes; | 1666 | power_info->info_3.asPowerPlayInfo[i].ucNumPciELanes; |
1664 | misc = le32_to_cpu(power_info->info_3.asPowerPlayInfo[i].ulMiscInfo); | 1667 | misc = le32_to_cpu(power_info->info_3.asPowerPlayInfo[i].ulMiscInfo); |
1665 | misc2 = le32_to_cpu(power_info->info_3.asPowerPlayInfo[i].ulMiscInfo2); | 1668 | misc2 = le32_to_cpu(power_info->info_3.asPowerPlayInfo[i].ulMiscInfo2); |
@@ -1688,6 +1691,8 @@ void radeon_atombios_get_power_modes(struct radeon_device *rdev) | |||
1688 | } | 1691 | } |
1689 | } | 1692 | } |
1690 | rdev->pm.power_state[state_index].flags = RADEON_PM_SINGLE_DISPLAY_ONLY; | 1693 | rdev->pm.power_state[state_index].flags = RADEON_PM_SINGLE_DISPLAY_ONLY; |
1694 | rdev->pm.power_state[state_index].misc = misc; | ||
1695 | rdev->pm.power_state[state_index].misc2 = misc2; | ||
1691 | /* order matters! */ | 1696 | /* order matters! */ |
1692 | if (misc & ATOM_PM_MISCINFO_POWER_SAVING_MODE) | 1697 | if (misc & ATOM_PM_MISCINFO_POWER_SAVING_MODE) |
1693 | rdev->pm.power_state[state_index].type = | 1698 | rdev->pm.power_state[state_index].type = |
@@ -1730,6 +1735,8 @@ void radeon_atombios_get_power_modes(struct radeon_device *rdev) | |||
1730 | &rdev->pm.power_state[state_index - 1].clock_info[0]; | 1735 | &rdev->pm.power_state[state_index - 1].clock_info[0]; |
1731 | rdev->pm.power_state[state_index].flags &= | 1736 | rdev->pm.power_state[state_index].flags &= |
1732 | ~RADEON_PM_SINGLE_DISPLAY_ONLY; | 1737 | ~RADEON_PM_SINGLE_DISPLAY_ONLY; |
1738 | rdev->pm.power_state[state_index].misc = 0; | ||
1739 | rdev->pm.power_state[state_index].misc2 = 0; | ||
1733 | } | 1740 | } |
1734 | } else { | 1741 | } else { |
1735 | /* add the i2c bus for thermal/fan chip */ | 1742 | /* add the i2c bus for thermal/fan chip */ |
@@ -1852,7 +1859,9 @@ void radeon_atombios_get_power_modes(struct radeon_device *rdev) | |||
1852 | if (mode_index) { | 1859 | if (mode_index) { |
1853 | misc = le32_to_cpu(non_clock_info->ulCapsAndSettings); | 1860 | misc = le32_to_cpu(non_clock_info->ulCapsAndSettings); |
1854 | misc2 = le16_to_cpu(non_clock_info->usClassification); | 1861 | misc2 = le16_to_cpu(non_clock_info->usClassification); |
1855 | rdev->pm.power_state[state_index].non_clock_info.pcie_lanes = | 1862 | rdev->pm.power_state[state_index].misc = misc; |
1863 | rdev->pm.power_state[state_index].misc2 = misc2; | ||
1864 | rdev->pm.power_state[state_index].pcie_lanes = | ||
1856 | ((misc & ATOM_PPLIB_PCIE_LINK_WIDTH_MASK) >> | 1865 | ((misc & ATOM_PPLIB_PCIE_LINK_WIDTH_MASK) >> |
1857 | ATOM_PPLIB_PCIE_LINK_WIDTH_SHIFT) + 1; | 1866 | ATOM_PPLIB_PCIE_LINK_WIDTH_SHIFT) + 1; |
1858 | switch (misc2 & ATOM_PPLIB_CLASSIFICATION_UI_MASK) { | 1867 | switch (misc2 & ATOM_PPLIB_CLASSIFICATION_UI_MASK) { |
@@ -1902,10 +1911,7 @@ void radeon_atombios_get_power_modes(struct radeon_device *rdev) | |||
1902 | rdev->pm.power_state[state_index].default_clock_mode = | 1911 | rdev->pm.power_state[state_index].default_clock_mode = |
1903 | &rdev->pm.power_state[state_index].clock_info[0]; | 1912 | &rdev->pm.power_state[state_index].clock_info[0]; |
1904 | rdev->pm.power_state[state_index].clock_info[0].voltage.type = VOLTAGE_NONE; | 1913 | rdev->pm.power_state[state_index].clock_info[0].voltage.type = VOLTAGE_NONE; |
1905 | if (rdev->asic->get_pcie_lanes) | 1914 | rdev->pm.power_state[state_index].pcie_lanes = 16; |
1906 | rdev->pm.power_state[state_index].non_clock_info.pcie_lanes = radeon_get_pcie_lanes(rdev); | ||
1907 | else | ||
1908 | rdev->pm.power_state[state_index].non_clock_info.pcie_lanes = 16; | ||
1909 | rdev->pm.default_power_state_index = state_index; | 1915 | rdev->pm.default_power_state_index = state_index; |
1910 | rdev->pm.power_state[state_index].flags = 0; | 1916 | rdev->pm.power_state[state_index].flags = 0; |
1911 | state_index++; | 1917 | state_index++; |