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authorPauli Nieminen <suokkos@gmail.com>2010-02-11 12:55:35 -0500
committerDave Airlie <airlied@redhat.com>2010-02-17 23:47:49 -0500
commitd80eeb0f347b6effa06e11e7cbcb2e6c559bf404 (patch)
tree3e10468e430a07ba75428ab81abe3db665671ff9 /drivers/gpu/drm/radeon/radeon_asic.h
parent93f319d31cc42a77bd5e953e861a8f2bfb277ad1 (diff)
drm/radeon/kms: Create asic structure for r300 pcie cards.
Setting global asic structure to point to different function would cause problem in system where is multiple r300 cards with different bus type. r300_asic_pcie is just copy from r300_asic with gart tlb functions replaced with pcie versions. Signed-off-by: Pauli Nieminen <suokkos@gmail.com> Signed-off-by: Dave Airlie <airlied@redhat.com>
Diffstat (limited to 'drivers/gpu/drm/radeon/radeon_asic.h')
-rw-r--r--drivers/gpu/drm/radeon/radeon_asic.h38
1 files changed, 38 insertions, 0 deletions
diff --git a/drivers/gpu/drm/radeon/radeon_asic.h b/drivers/gpu/drm/radeon/radeon_asic.h
index 4b0cb67a379a..9d2a113f78eb 100644
--- a/drivers/gpu/drm/radeon/radeon_asic.h
+++ b/drivers/gpu/drm/radeon/radeon_asic.h
@@ -183,6 +183,44 @@ static struct radeon_asic r300_asic = {
183 .ioctl_wait_idle = NULL, 183 .ioctl_wait_idle = NULL,
184}; 184};
185 185
186
187static struct radeon_asic r300_asic_pcie = {
188 .init = &r300_init,
189 .fini = &r300_fini,
190 .suspend = &r300_suspend,
191 .resume = &r300_resume,
192 .vga_set_state = &r100_vga_set_state,
193 .gpu_reset = &r300_gpu_reset,
194 .gart_tlb_flush = &rv370_pcie_gart_tlb_flush,
195 .gart_set_page = &rv370_pcie_gart_set_page,
196 .cp_commit = &r100_cp_commit,
197 .ring_start = &r300_ring_start,
198 .ring_test = &r100_ring_test,
199 .ring_ib_execute = &r100_ring_ib_execute,
200 .irq_set = &r100_irq_set,
201 .irq_process = &r100_irq_process,
202 .get_vblank_counter = &r100_get_vblank_counter,
203 .fence_ring_emit = &r300_fence_ring_emit,
204 .cs_parse = &r300_cs_parse,
205 .copy_blit = &r100_copy_blit,
206 .copy_dma = &r200_copy_dma,
207 .copy = &r100_copy_blit,
208 .get_engine_clock = &radeon_legacy_get_engine_clock,
209 .set_engine_clock = &radeon_legacy_set_engine_clock,
210 .get_memory_clock = &radeon_legacy_get_memory_clock,
211 .set_memory_clock = NULL,
212 .set_pcie_lanes = &rv370_set_pcie_lanes,
213 .set_clock_gating = &radeon_legacy_set_clock_gating,
214 .set_surface_reg = r100_set_surface_reg,
215 .clear_surface_reg = r100_clear_surface_reg,
216 .bandwidth_update = &r100_bandwidth_update,
217 .hpd_init = &r100_hpd_init,
218 .hpd_fini = &r100_hpd_fini,
219 .hpd_sense = &r100_hpd_sense,
220 .hpd_set_polarity = &r100_hpd_set_polarity,
221 .ioctl_wait_idle = NULL,
222};
223
186/* 224/*
187 * r420,r423,rv410 225 * r420,r423,rv410
188 */ 226 */