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authorJerome Glisse <jglisse@redhat.com>2009-09-28 14:39:19 -0400
committerDave Airlie <airlied@linux.ie>2009-09-28 21:15:56 -0400
commitf0ed1f655aa0375e2abba84cc4e8e6c853d48555 (patch)
treec7b6495e7836e333a82262e9c9cf0af716e80fc7 /drivers/gpu/drm/radeon/radeon_asic.h
parentd39c3b895876427c5083a936e00f3f5b7f0fc1b3 (diff)
drm/radeon/kms: Convert R520 to new init path and associated cleanup
Convert the r520 asic support to new init path, change are smaller than previous one as most of the architecture is now in place and more code sharing can happen btw various asics. Signed-off-by: Jerome Glisse <jglisse@redhat.com> Signed-off-by: Dave Airlie <airlied@linux.ie>
Diffstat (limited to 'drivers/gpu/drm/radeon/radeon_asic.h')
-rw-r--r--drivers/gpu/drm/radeon/radeon_asic.h43
1 files changed, 21 insertions, 22 deletions
diff --git a/drivers/gpu/drm/radeon/radeon_asic.h b/drivers/gpu/drm/radeon/radeon_asic.h
index ccbf5253914d..bce0cb063867 100644
--- a/drivers/gpu/drm/radeon/radeon_asic.h
+++ b/drivers/gpu/drm/radeon/radeon_asic.h
@@ -471,34 +471,33 @@ static struct radeon_asic rv515_asic = {
471 * r520,rv530,rv560,rv570,r580 471 * r520,rv530,rv560,rv570,r580
472 */ 472 */
473int r520_init(struct radeon_device *rdev); 473int r520_init(struct radeon_device *rdev);
474void r520_errata(struct radeon_device *rdev); 474int r520_resume(struct radeon_device *rdev);
475void r520_vram_info(struct radeon_device *rdev);
476int r520_mc_init(struct radeon_device *rdev);
477void r520_mc_fini(struct radeon_device *rdev);
478void r520_bandwidth_update(struct radeon_device *rdev);
479static struct radeon_asic r520_asic = { 475static struct radeon_asic r520_asic = {
480 .init = &r520_init, 476 .init = &r520_init,
481 .errata = &r520_errata, 477 .fini = &rv515_fini,
482 .vram_info = &r520_vram_info, 478 .suspend = &rv515_suspend,
479 .resume = &r520_resume,
480 .errata = NULL,
481 .vram_info = NULL,
483 .gpu_reset = &rv515_gpu_reset, 482 .gpu_reset = &rv515_gpu_reset,
484 .mc_init = &r520_mc_init, 483 .mc_init = NULL,
485 .mc_fini = &r520_mc_fini, 484 .mc_fini = NULL,
486 .wb_init = &r100_wb_init, 485 .wb_init = NULL,
487 .wb_fini = &r100_wb_fini, 486 .wb_fini = NULL,
488 .gart_init = &rv370_pcie_gart_init, 487 .gart_init = NULL,
489 .gart_fini = &rv370_pcie_gart_fini, 488 .gart_fini = NULL,
490 .gart_enable = &rv370_pcie_gart_enable, 489 .gart_enable = NULL,
491 .gart_disable = &rv370_pcie_gart_disable, 490 .gart_disable = NULL,
492 .gart_tlb_flush = &rv370_pcie_gart_tlb_flush, 491 .gart_tlb_flush = &rv370_pcie_gart_tlb_flush,
493 .gart_set_page = &rv370_pcie_gart_set_page, 492 .gart_set_page = &rv370_pcie_gart_set_page,
494 .cp_init = &r100_cp_init, 493 .cp_init = NULL,
495 .cp_fini = &r100_cp_fini, 494 .cp_fini = NULL,
496 .cp_disable = &r100_cp_disable, 495 .cp_disable = NULL,
497 .cp_commit = &r100_cp_commit, 496 .cp_commit = &r100_cp_commit,
498 .ring_start = &rv515_ring_start, 497 .ring_start = &rv515_ring_start,
499 .ring_test = &r100_ring_test, 498 .ring_test = &r100_ring_test,
500 .ring_ib_execute = &r100_ring_ib_execute, 499 .ring_ib_execute = &r100_ring_ib_execute,
501 .ib_test = &r100_ib_test, 500 .ib_test = NULL,
502 .irq_set = &rs600_irq_set, 501 .irq_set = &rs600_irq_set,
503 .irq_process = &rs600_irq_process, 502 .irq_process = &rs600_irq_process,
504 .get_vblank_counter = &rs600_get_vblank_counter, 503 .get_vblank_counter = &rs600_get_vblank_counter,
@@ -513,7 +512,7 @@ static struct radeon_asic r520_asic = {
513 .set_clock_gating = &radeon_atom_set_clock_gating, 512 .set_clock_gating = &radeon_atom_set_clock_gating,
514 .set_surface_reg = r100_set_surface_reg, 513 .set_surface_reg = r100_set_surface_reg,
515 .clear_surface_reg = r100_clear_surface_reg, 514 .clear_surface_reg = r100_clear_surface_reg,
516 .bandwidth_update = &r520_bandwidth_update, 515 .bandwidth_update = &rv515_bandwidth_update,
517}; 516};
518 517
519/* 518/*
@@ -588,7 +587,7 @@ static struct radeon_asic r600_asic = {
588 .set_clock_gating = &radeon_atom_set_clock_gating, 587 .set_clock_gating = &radeon_atom_set_clock_gating,
589 .set_surface_reg = r600_set_surface_reg, 588 .set_surface_reg = r600_set_surface_reg,
590 .clear_surface_reg = r600_clear_surface_reg, 589 .clear_surface_reg = r600_clear_surface_reg,
591 .bandwidth_update = &r520_bandwidth_update, 590 .bandwidth_update = &rv515_bandwidth_update,
592}; 591};
593 592
594/* 593/*
@@ -637,7 +636,7 @@ static struct radeon_asic rv770_asic = {
637 .set_clock_gating = &radeon_atom_set_clock_gating, 636 .set_clock_gating = &radeon_atom_set_clock_gating,
638 .set_surface_reg = r600_set_surface_reg, 637 .set_surface_reg = r600_set_surface_reg,
639 .clear_surface_reg = r600_clear_surface_reg, 638 .clear_surface_reg = r600_clear_surface_reg,
640 .bandwidth_update = &r520_bandwidth_update, 639 .bandwidth_update = &rv515_bandwidth_update,
641}; 640};
642 641
643#endif 642#endif