diff options
author | Alex Deucher <alexander.deucher@amd.com> | 2012-02-23 17:53:43 -0500 |
---|---|---|
committer | Dave Airlie <airlied@redhat.com> | 2012-02-29 05:14:29 -0500 |
commit | b35ea4ab8884b363440d38db3c7c89edfb3682a1 (patch) | |
tree | b277972767c4a95366e5c1a3a3858aaed4429254 /drivers/gpu/drm/radeon/radeon_asic.c | |
parent | 27cd77694bfa2e123cb7440507f8ddd762de6c38 (diff) |
drm/radeon/kms: reorganize irq callbacks
tidy up the radeon_asic struct.
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Christian König<christian.koenig@amd.com>
Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
Reviewed-by: Jerome Glisse <jglisse@redhat.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
Diffstat (limited to 'drivers/gpu/drm/radeon/radeon_asic.c')
-rw-r--r-- | drivers/gpu/drm/radeon/radeon_asic.c | 102 |
1 files changed, 68 insertions, 34 deletions
diff --git a/drivers/gpu/drm/radeon/radeon_asic.c b/drivers/gpu/drm/radeon/radeon_asic.c index 6bd15254f643..a7b6c37d8fa4 100644 --- a/drivers/gpu/drm/radeon/radeon_asic.c +++ b/drivers/gpu/drm/radeon/radeon_asic.c | |||
@@ -148,8 +148,10 @@ static struct radeon_asic r100_asic = { | |||
148 | .cs_parse = &r100_cs_parse, | 148 | .cs_parse = &r100_cs_parse, |
149 | } | 149 | } |
150 | }, | 150 | }, |
151 | .irq_set = &r100_irq_set, | 151 | .irq = { |
152 | .irq_process = &r100_irq_process, | 152 | .set = &r100_irq_set, |
153 | .process = &r100_irq_process, | ||
154 | }, | ||
153 | .get_vblank_counter = &r100_get_vblank_counter, | 155 | .get_vblank_counter = &r100_get_vblank_counter, |
154 | .copy = { | 156 | .copy = { |
155 | .blit = &r100_copy_blit, | 157 | .blit = &r100_copy_blit, |
@@ -213,8 +215,10 @@ static struct radeon_asic r200_asic = { | |||
213 | .cs_parse = &r100_cs_parse, | 215 | .cs_parse = &r100_cs_parse, |
214 | } | 216 | } |
215 | }, | 217 | }, |
216 | .irq_set = &r100_irq_set, | 218 | .irq = { |
217 | .irq_process = &r100_irq_process, | 219 | .set = &r100_irq_set, |
220 | .process = &r100_irq_process, | ||
221 | }, | ||
218 | .get_vblank_counter = &r100_get_vblank_counter, | 222 | .get_vblank_counter = &r100_get_vblank_counter, |
219 | .copy = { | 223 | .copy = { |
220 | .blit = &r100_copy_blit, | 224 | .blit = &r100_copy_blit, |
@@ -277,8 +281,10 @@ static struct radeon_asic r300_asic = { | |||
277 | .cs_parse = &r300_cs_parse, | 281 | .cs_parse = &r300_cs_parse, |
278 | } | 282 | } |
279 | }, | 283 | }, |
280 | .irq_set = &r100_irq_set, | 284 | .irq = { |
281 | .irq_process = &r100_irq_process, | 285 | .set = &r100_irq_set, |
286 | .process = &r100_irq_process, | ||
287 | }, | ||
282 | .get_vblank_counter = &r100_get_vblank_counter, | 288 | .get_vblank_counter = &r100_get_vblank_counter, |
283 | .copy = { | 289 | .copy = { |
284 | .blit = &r100_copy_blit, | 290 | .blit = &r100_copy_blit, |
@@ -342,8 +348,10 @@ static struct radeon_asic r300_asic_pcie = { | |||
342 | .cs_parse = &r300_cs_parse, | 348 | .cs_parse = &r300_cs_parse, |
343 | } | 349 | } |
344 | }, | 350 | }, |
345 | .irq_set = &r100_irq_set, | 351 | .irq = { |
346 | .irq_process = &r100_irq_process, | 352 | .set = &r100_irq_set, |
353 | .process = &r100_irq_process, | ||
354 | }, | ||
347 | .get_vblank_counter = &r100_get_vblank_counter, | 355 | .get_vblank_counter = &r100_get_vblank_counter, |
348 | .copy = { | 356 | .copy = { |
349 | .blit = &r100_copy_blit, | 357 | .blit = &r100_copy_blit, |
@@ -406,8 +414,10 @@ static struct radeon_asic r420_asic = { | |||
406 | .cs_parse = &r300_cs_parse, | 414 | .cs_parse = &r300_cs_parse, |
407 | } | 415 | } |
408 | }, | 416 | }, |
409 | .irq_set = &r100_irq_set, | 417 | .irq = { |
410 | .irq_process = &r100_irq_process, | 418 | .set = &r100_irq_set, |
419 | .process = &r100_irq_process, | ||
420 | }, | ||
411 | .get_vblank_counter = &r100_get_vblank_counter, | 421 | .get_vblank_counter = &r100_get_vblank_counter, |
412 | .copy = { | 422 | .copy = { |
413 | .blit = &r100_copy_blit, | 423 | .blit = &r100_copy_blit, |
@@ -471,8 +481,10 @@ static struct radeon_asic rs400_asic = { | |||
471 | .cs_parse = &r300_cs_parse, | 481 | .cs_parse = &r300_cs_parse, |
472 | } | 482 | } |
473 | }, | 483 | }, |
474 | .irq_set = &r100_irq_set, | 484 | .irq = { |
475 | .irq_process = &r100_irq_process, | 485 | .set = &r100_irq_set, |
486 | .process = &r100_irq_process, | ||
487 | }, | ||
476 | .get_vblank_counter = &r100_get_vblank_counter, | 488 | .get_vblank_counter = &r100_get_vblank_counter, |
477 | .copy = { | 489 | .copy = { |
478 | .blit = &r100_copy_blit, | 490 | .blit = &r100_copy_blit, |
@@ -536,8 +548,10 @@ static struct radeon_asic rs600_asic = { | |||
536 | .cs_parse = &r300_cs_parse, | 548 | .cs_parse = &r300_cs_parse, |
537 | } | 549 | } |
538 | }, | 550 | }, |
539 | .irq_set = &rs600_irq_set, | 551 | .irq = { |
540 | .irq_process = &rs600_irq_process, | 552 | .set = &rs600_irq_set, |
553 | .process = &rs600_irq_process, | ||
554 | }, | ||
541 | .get_vblank_counter = &rs600_get_vblank_counter, | 555 | .get_vblank_counter = &rs600_get_vblank_counter, |
542 | .copy = { | 556 | .copy = { |
543 | .blit = &r100_copy_blit, | 557 | .blit = &r100_copy_blit, |
@@ -601,8 +615,10 @@ static struct radeon_asic rs690_asic = { | |||
601 | .cs_parse = &r300_cs_parse, | 615 | .cs_parse = &r300_cs_parse, |
602 | } | 616 | } |
603 | }, | 617 | }, |
604 | .irq_set = &rs600_irq_set, | 618 | .irq = { |
605 | .irq_process = &rs600_irq_process, | 619 | .set = &rs600_irq_set, |
620 | .process = &rs600_irq_process, | ||
621 | }, | ||
606 | .get_vblank_counter = &rs600_get_vblank_counter, | 622 | .get_vblank_counter = &rs600_get_vblank_counter, |
607 | .copy = { | 623 | .copy = { |
608 | .blit = &r100_copy_blit, | 624 | .blit = &r100_copy_blit, |
@@ -666,8 +682,10 @@ static struct radeon_asic rv515_asic = { | |||
666 | .cs_parse = &r300_cs_parse, | 682 | .cs_parse = &r300_cs_parse, |
667 | } | 683 | } |
668 | }, | 684 | }, |
669 | .irq_set = &rs600_irq_set, | 685 | .irq = { |
670 | .irq_process = &rs600_irq_process, | 686 | .set = &rs600_irq_set, |
687 | .process = &rs600_irq_process, | ||
688 | }, | ||
671 | .get_vblank_counter = &rs600_get_vblank_counter, | 689 | .get_vblank_counter = &rs600_get_vblank_counter, |
672 | .copy = { | 690 | .copy = { |
673 | .blit = &r100_copy_blit, | 691 | .blit = &r100_copy_blit, |
@@ -731,8 +749,10 @@ static struct radeon_asic r520_asic = { | |||
731 | .cs_parse = &r300_cs_parse, | 749 | .cs_parse = &r300_cs_parse, |
732 | } | 750 | } |
733 | }, | 751 | }, |
734 | .irq_set = &rs600_irq_set, | 752 | .irq = { |
735 | .irq_process = &rs600_irq_process, | 753 | .set = &rs600_irq_set, |
754 | .process = &rs600_irq_process, | ||
755 | }, | ||
736 | .get_vblank_counter = &rs600_get_vblank_counter, | 756 | .get_vblank_counter = &rs600_get_vblank_counter, |
737 | .copy = { | 757 | .copy = { |
738 | .blit = &r100_copy_blit, | 758 | .blit = &r100_copy_blit, |
@@ -795,8 +815,10 @@ static struct radeon_asic r600_asic = { | |||
795 | .cs_parse = &r600_cs_parse, | 815 | .cs_parse = &r600_cs_parse, |
796 | } | 816 | } |
797 | }, | 817 | }, |
798 | .irq_set = &r600_irq_set, | 818 | .irq = { |
799 | .irq_process = &r600_irq_process, | 819 | .set = &r600_irq_set, |
820 | .process = &r600_irq_process, | ||
821 | }, | ||
800 | .get_vblank_counter = &rs600_get_vblank_counter, | 822 | .get_vblank_counter = &rs600_get_vblank_counter, |
801 | .copy = { | 823 | .copy = { |
802 | .blit = &r600_copy_blit, | 824 | .blit = &r600_copy_blit, |
@@ -859,8 +881,10 @@ static struct radeon_asic rs780_asic = { | |||
859 | .cs_parse = &r600_cs_parse, | 881 | .cs_parse = &r600_cs_parse, |
860 | } | 882 | } |
861 | }, | 883 | }, |
862 | .irq_set = &r600_irq_set, | 884 | .irq = { |
863 | .irq_process = &r600_irq_process, | 885 | .set = &r600_irq_set, |
886 | .process = &r600_irq_process, | ||
887 | }, | ||
864 | .get_vblank_counter = &rs600_get_vblank_counter, | 888 | .get_vblank_counter = &rs600_get_vblank_counter, |
865 | .copy = { | 889 | .copy = { |
866 | .blit = &r600_copy_blit, | 890 | .blit = &r600_copy_blit, |
@@ -923,8 +947,10 @@ static struct radeon_asic rv770_asic = { | |||
923 | .cs_parse = &r600_cs_parse, | 947 | .cs_parse = &r600_cs_parse, |
924 | } | 948 | } |
925 | }, | 949 | }, |
926 | .irq_set = &r600_irq_set, | 950 | .irq = { |
927 | .irq_process = &r600_irq_process, | 951 | .set = &r600_irq_set, |
952 | .process = &r600_irq_process, | ||
953 | }, | ||
928 | .get_vblank_counter = &rs600_get_vblank_counter, | 954 | .get_vblank_counter = &rs600_get_vblank_counter, |
929 | .copy = { | 955 | .copy = { |
930 | .blit = &r600_copy_blit, | 956 | .blit = &r600_copy_blit, |
@@ -987,8 +1013,10 @@ static struct radeon_asic evergreen_asic = { | |||
987 | .cs_parse = &evergreen_cs_parse, | 1013 | .cs_parse = &evergreen_cs_parse, |
988 | } | 1014 | } |
989 | }, | 1015 | }, |
990 | .irq_set = &evergreen_irq_set, | 1016 | .irq = { |
991 | .irq_process = &evergreen_irq_process, | 1017 | .set = &evergreen_irq_set, |
1018 | .process = &evergreen_irq_process, | ||
1019 | }, | ||
992 | .get_vblank_counter = &evergreen_get_vblank_counter, | 1020 | .get_vblank_counter = &evergreen_get_vblank_counter, |
993 | .copy = { | 1021 | .copy = { |
994 | .blit = &r600_copy_blit, | 1022 | .blit = &r600_copy_blit, |
@@ -1051,8 +1079,10 @@ static struct radeon_asic sumo_asic = { | |||
1051 | .cs_parse = &evergreen_cs_parse, | 1079 | .cs_parse = &evergreen_cs_parse, |
1052 | }, | 1080 | }, |
1053 | }, | 1081 | }, |
1054 | .irq_set = &evergreen_irq_set, | 1082 | .irq = { |
1055 | .irq_process = &evergreen_irq_process, | 1083 | .set = &evergreen_irq_set, |
1084 | .process = &evergreen_irq_process, | ||
1085 | }, | ||
1056 | .get_vblank_counter = &evergreen_get_vblank_counter, | 1086 | .get_vblank_counter = &evergreen_get_vblank_counter, |
1057 | .copy = { | 1087 | .copy = { |
1058 | .blit = &r600_copy_blit, | 1088 | .blit = &r600_copy_blit, |
@@ -1115,8 +1145,10 @@ static struct radeon_asic btc_asic = { | |||
1115 | .cs_parse = &evergreen_cs_parse, | 1145 | .cs_parse = &evergreen_cs_parse, |
1116 | } | 1146 | } |
1117 | }, | 1147 | }, |
1118 | .irq_set = &evergreen_irq_set, | 1148 | .irq = { |
1119 | .irq_process = &evergreen_irq_process, | 1149 | .set = &evergreen_irq_set, |
1150 | .process = &evergreen_irq_process, | ||
1151 | }, | ||
1120 | .get_vblank_counter = &evergreen_get_vblank_counter, | 1152 | .get_vblank_counter = &evergreen_get_vblank_counter, |
1121 | .copy = { | 1153 | .copy = { |
1122 | .blit = &r600_copy_blit, | 1154 | .blit = &r600_copy_blit, |
@@ -1204,8 +1236,10 @@ static struct radeon_asic cayman_asic = { | |||
1204 | .cs_parse = &evergreen_cs_parse, | 1236 | .cs_parse = &evergreen_cs_parse, |
1205 | } | 1237 | } |
1206 | }, | 1238 | }, |
1207 | .irq_set = &evergreen_irq_set, | 1239 | .irq = { |
1208 | .irq_process = &evergreen_irq_process, | 1240 | .set = &evergreen_irq_set, |
1241 | .process = &evergreen_irq_process, | ||
1242 | }, | ||
1209 | .get_vblank_counter = &evergreen_get_vblank_counter, | 1243 | .get_vblank_counter = &evergreen_get_vblank_counter, |
1210 | .copy = { | 1244 | .copy = { |
1211 | .blit = &r600_copy_blit, | 1245 | .blit = &r600_copy_blit, |