diff options
author | Christian König <deathsimple@vodafone.de> | 2012-08-08 06:22:43 -0400 |
---|---|---|
committer | Alex Deucher <alexander.deucher@amd.com> | 2012-09-20 13:10:39 -0400 |
commit | 9b40e5d8427f12567749978f66e86e5e8fced5ab (patch) | |
tree | b4353bad316dc1e0d5a8e57d9acfcf7d3991770d /drivers/gpu/drm/radeon/radeon_asic.c | |
parent | f82cbddddbd368f391d45738601fa29a75cfbe3b (diff) |
drm/radeon: make VM flushs a ring operation
Move flushing the VMs as function into the rings.
First step to make VM operations async.
Signed-off-by: Christian König <deathsimple@vodafone.de>
Reviewed-by: Jerome Glisse <jglisse@redhat.com>
Diffstat (limited to 'drivers/gpu/drm/radeon/radeon_asic.c')
-rw-r--r-- | drivers/gpu/drm/radeon/radeon_asic.c | 12 |
1 files changed, 9 insertions, 3 deletions
diff --git a/drivers/gpu/drm/radeon/radeon_asic.c b/drivers/gpu/drm/radeon/radeon_asic.c index f524735f05ad..4a6e39f7ffd1 100644 --- a/drivers/gpu/drm/radeon/radeon_asic.c +++ b/drivers/gpu/drm/radeon/radeon_asic.c | |||
@@ -1376,7 +1376,6 @@ static struct radeon_asic cayman_asic = { | |||
1376 | .init = &cayman_vm_init, | 1376 | .init = &cayman_vm_init, |
1377 | .fini = &cayman_vm_fini, | 1377 | .fini = &cayman_vm_fini, |
1378 | .bind = &cayman_vm_bind, | 1378 | .bind = &cayman_vm_bind, |
1379 | .tlb_flush = &cayman_vm_tlb_flush, | ||
1380 | .page_flags = &cayman_vm_page_flags, | 1379 | .page_flags = &cayman_vm_page_flags, |
1381 | .set_page = &cayman_vm_set_page, | 1380 | .set_page = &cayman_vm_set_page, |
1382 | }, | 1381 | }, |
@@ -1390,6 +1389,7 @@ static struct radeon_asic cayman_asic = { | |||
1390 | .ring_test = &r600_ring_test, | 1389 | .ring_test = &r600_ring_test, |
1391 | .ib_test = &r600_ib_test, | 1390 | .ib_test = &r600_ib_test, |
1392 | .is_lockup = &evergreen_gpu_is_lockup, | 1391 | .is_lockup = &evergreen_gpu_is_lockup, |
1392 | .vm_flush = &cayman_vm_flush, | ||
1393 | }, | 1393 | }, |
1394 | [CAYMAN_RING_TYPE_CP1_INDEX] = { | 1394 | [CAYMAN_RING_TYPE_CP1_INDEX] = { |
1395 | .ib_execute = &cayman_ring_ib_execute, | 1395 | .ib_execute = &cayman_ring_ib_execute, |
@@ -1400,6 +1400,7 @@ static struct radeon_asic cayman_asic = { | |||
1400 | .ring_test = &r600_ring_test, | 1400 | .ring_test = &r600_ring_test, |
1401 | .ib_test = &r600_ib_test, | 1401 | .ib_test = &r600_ib_test, |
1402 | .is_lockup = &evergreen_gpu_is_lockup, | 1402 | .is_lockup = &evergreen_gpu_is_lockup, |
1403 | .vm_flush = &cayman_vm_flush, | ||
1403 | }, | 1404 | }, |
1404 | [CAYMAN_RING_TYPE_CP2_INDEX] = { | 1405 | [CAYMAN_RING_TYPE_CP2_INDEX] = { |
1405 | .ib_execute = &cayman_ring_ib_execute, | 1406 | .ib_execute = &cayman_ring_ib_execute, |
@@ -1410,6 +1411,7 @@ static struct radeon_asic cayman_asic = { | |||
1410 | .ring_test = &r600_ring_test, | 1411 | .ring_test = &r600_ring_test, |
1411 | .ib_test = &r600_ib_test, | 1412 | .ib_test = &r600_ib_test, |
1412 | .is_lockup = &evergreen_gpu_is_lockup, | 1413 | .is_lockup = &evergreen_gpu_is_lockup, |
1414 | .vm_flush = &cayman_vm_flush, | ||
1413 | } | 1415 | } |
1414 | }, | 1416 | }, |
1415 | .irq = { | 1417 | .irq = { |
@@ -1479,7 +1481,6 @@ static struct radeon_asic trinity_asic = { | |||
1479 | .init = &cayman_vm_init, | 1481 | .init = &cayman_vm_init, |
1480 | .fini = &cayman_vm_fini, | 1482 | .fini = &cayman_vm_fini, |
1481 | .bind = &cayman_vm_bind, | 1483 | .bind = &cayman_vm_bind, |
1482 | .tlb_flush = &cayman_vm_tlb_flush, | ||
1483 | .page_flags = &cayman_vm_page_flags, | 1484 | .page_flags = &cayman_vm_page_flags, |
1484 | .set_page = &cayman_vm_set_page, | 1485 | .set_page = &cayman_vm_set_page, |
1485 | }, | 1486 | }, |
@@ -1493,6 +1494,7 @@ static struct radeon_asic trinity_asic = { | |||
1493 | .ring_test = &r600_ring_test, | 1494 | .ring_test = &r600_ring_test, |
1494 | .ib_test = &r600_ib_test, | 1495 | .ib_test = &r600_ib_test, |
1495 | .is_lockup = &evergreen_gpu_is_lockup, | 1496 | .is_lockup = &evergreen_gpu_is_lockup, |
1497 | .vm_flush = &cayman_vm_flush, | ||
1496 | }, | 1498 | }, |
1497 | [CAYMAN_RING_TYPE_CP1_INDEX] = { | 1499 | [CAYMAN_RING_TYPE_CP1_INDEX] = { |
1498 | .ib_execute = &cayman_ring_ib_execute, | 1500 | .ib_execute = &cayman_ring_ib_execute, |
@@ -1503,6 +1505,7 @@ static struct radeon_asic trinity_asic = { | |||
1503 | .ring_test = &r600_ring_test, | 1505 | .ring_test = &r600_ring_test, |
1504 | .ib_test = &r600_ib_test, | 1506 | .ib_test = &r600_ib_test, |
1505 | .is_lockup = &evergreen_gpu_is_lockup, | 1507 | .is_lockup = &evergreen_gpu_is_lockup, |
1508 | .vm_flush = &cayman_vm_flush, | ||
1506 | }, | 1509 | }, |
1507 | [CAYMAN_RING_TYPE_CP2_INDEX] = { | 1510 | [CAYMAN_RING_TYPE_CP2_INDEX] = { |
1508 | .ib_execute = &cayman_ring_ib_execute, | 1511 | .ib_execute = &cayman_ring_ib_execute, |
@@ -1513,6 +1516,7 @@ static struct radeon_asic trinity_asic = { | |||
1513 | .ring_test = &r600_ring_test, | 1516 | .ring_test = &r600_ring_test, |
1514 | .ib_test = &r600_ib_test, | 1517 | .ib_test = &r600_ib_test, |
1515 | .is_lockup = &evergreen_gpu_is_lockup, | 1518 | .is_lockup = &evergreen_gpu_is_lockup, |
1519 | .vm_flush = &cayman_vm_flush, | ||
1516 | } | 1520 | } |
1517 | }, | 1521 | }, |
1518 | .irq = { | 1522 | .irq = { |
@@ -1582,7 +1586,6 @@ static struct radeon_asic si_asic = { | |||
1582 | .init = &si_vm_init, | 1586 | .init = &si_vm_init, |
1583 | .fini = &si_vm_fini, | 1587 | .fini = &si_vm_fini, |
1584 | .bind = &si_vm_bind, | 1588 | .bind = &si_vm_bind, |
1585 | .tlb_flush = &si_vm_tlb_flush, | ||
1586 | .page_flags = &cayman_vm_page_flags, | 1589 | .page_flags = &cayman_vm_page_flags, |
1587 | .set_page = &cayman_vm_set_page, | 1590 | .set_page = &cayman_vm_set_page, |
1588 | }, | 1591 | }, |
@@ -1596,6 +1599,7 @@ static struct radeon_asic si_asic = { | |||
1596 | .ring_test = &r600_ring_test, | 1599 | .ring_test = &r600_ring_test, |
1597 | .ib_test = &r600_ib_test, | 1600 | .ib_test = &r600_ib_test, |
1598 | .is_lockup = &si_gpu_is_lockup, | 1601 | .is_lockup = &si_gpu_is_lockup, |
1602 | .vm_flush = &cayman_vm_flush, | ||
1599 | }, | 1603 | }, |
1600 | [CAYMAN_RING_TYPE_CP1_INDEX] = { | 1604 | [CAYMAN_RING_TYPE_CP1_INDEX] = { |
1601 | .ib_execute = &si_ring_ib_execute, | 1605 | .ib_execute = &si_ring_ib_execute, |
@@ -1606,6 +1610,7 @@ static struct radeon_asic si_asic = { | |||
1606 | .ring_test = &r600_ring_test, | 1610 | .ring_test = &r600_ring_test, |
1607 | .ib_test = &r600_ib_test, | 1611 | .ib_test = &r600_ib_test, |
1608 | .is_lockup = &si_gpu_is_lockup, | 1612 | .is_lockup = &si_gpu_is_lockup, |
1613 | .vm_flush = &cayman_vm_flush, | ||
1609 | }, | 1614 | }, |
1610 | [CAYMAN_RING_TYPE_CP2_INDEX] = { | 1615 | [CAYMAN_RING_TYPE_CP2_INDEX] = { |
1611 | .ib_execute = &si_ring_ib_execute, | 1616 | .ib_execute = &si_ring_ib_execute, |
@@ -1616,6 +1621,7 @@ static struct radeon_asic si_asic = { | |||
1616 | .ring_test = &r600_ring_test, | 1621 | .ring_test = &r600_ring_test, |
1617 | .ib_test = &r600_ib_test, | 1622 | .ib_test = &r600_ib_test, |
1618 | .is_lockup = &si_gpu_is_lockup, | 1623 | .is_lockup = &si_gpu_is_lockup, |
1624 | .vm_flush = &cayman_vm_flush, | ||
1619 | } | 1625 | } |
1620 | }, | 1626 | }, |
1621 | .irq = { | 1627 | .irq = { |