drm/radeon/dpm: implement UVD powergating for CI

Disable the UVD block when not in use to save power.
The block is not actually powergated on CI, but we
switch between UVD DPM (where the uvd clocks are
adjusted on demand) and clocks off.

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

1 files changed, 1 insertions, 0 deletions

diff --git a/drivers/gpu/drm/radeon/radeon_asic.c b/drivers/gpu/drm/radeon/radeon_asic.c
index 63b6aae66236..61c06449b31a 100644
--- a/drivers/gpu/drm/radeon/radeon_asic.c
+++ b/drivers/gpu/drm/radeon/radeon_asic.c
@@ -2470,6 +2470,7 @@ static struct radeon_asic ci_asic = {
                 .debugfs_print_current_performance_level = &ci_dpm_debugfs_print_current_performance_level,
                 .force_performance_level = &ci_dpm_force_performance_level,
                 .vblank_too_short = &ci_dpm_vblank_too_short,
+                .powergate_uvd = &ci_dpm_powergate_uvd,
         },
         .pflip = {
                 .pre_page_flip = &evergreen_pre_page_flip,