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authorJerome Glisse <jglisse@redhat.com>2010-02-15 15:36:13 -0500
committerDave Airlie <airlied@redhat.com>2010-02-15 16:59:23 -0500
commite821767bebdae6a46f6d897a4385f6218bee7f27 (patch)
tree0a97f6a74f946c12d4821d9d82c8255e951d026f /drivers/gpu/drm/radeon/radeon.h
parent2e98f10a7a87ebae4dcc3949028a32008b46ceef (diff)
drm/radeon/kms: fix indirect buffer management V2
There is 3 different distinct states for an indirect buffer (IB) : 1- free with no fence 2- free with a fence 3- non free (fence doesn't matter) Previous code mixed case 2 & 3 in a single one leading to possible catastrophique failure. This patch rework the handling and properly separate each case. So when you get ib we set the ib as non free and fence status doesn't matter. Fence become active (ie has a meaning for the ib code) once the ib is scheduled or free. This patch also get rid of the alloc bitmap as it was overkill, we know go through IB pool list like in a ring buffer as the oldest IB is the first one the will be free. Fix : https://bugs.freedesktop.org/show_bug.cgi?id=26438 and likely other bugs. V2 remove the scheduled list, it's useless now, fix free ib scanning Signed-off-by: Jerome Glisse <jglisse@redhat.com> Signed-off-by: Dave Airlie <airlied@redhat.com>
Diffstat (limited to 'drivers/gpu/drm/radeon/radeon.h')
-rw-r--r--drivers/gpu/drm/radeon/radeon.h9
1 files changed, 5 insertions, 4 deletions
diff --git a/drivers/gpu/drm/radeon/radeon.h b/drivers/gpu/drm/radeon/radeon.h
index 993cdf20d8e6..9f35beed13e8 100644
--- a/drivers/gpu/drm/radeon/radeon.h
+++ b/drivers/gpu/drm/radeon/radeon.h
@@ -97,6 +97,7 @@ extern int radeon_audio;
97 * symbol; 97 * symbol;
98 */ 98 */
99#define RADEON_MAX_USEC_TIMEOUT 100000 /* 100 ms */ 99#define RADEON_MAX_USEC_TIMEOUT 100000 /* 100 ms */
100/* RADEON_IB_POOL_SIZE must be a power of 2 */
100#define RADEON_IB_POOL_SIZE 16 101#define RADEON_IB_POOL_SIZE 16
101#define RADEON_DEBUGFS_MAX_NUM_FILES 32 102#define RADEON_DEBUGFS_MAX_NUM_FILES 32
102#define RADEONFB_CONN_LIMIT 4 103#define RADEONFB_CONN_LIMIT 4
@@ -371,11 +372,12 @@ void radeon_irq_kms_sw_irq_put(struct radeon_device *rdev);
371 */ 372 */
372struct radeon_ib { 373struct radeon_ib {
373 struct list_head list; 374 struct list_head list;
374 unsigned long idx; 375 unsigned idx;
375 uint64_t gpu_addr; 376 uint64_t gpu_addr;
376 struct radeon_fence *fence; 377 struct radeon_fence *fence;
377 uint32_t *ptr; 378 uint32_t *ptr;
378 uint32_t length_dw; 379 uint32_t length_dw;
380 bool free;
379}; 381};
380 382
381/* 383/*
@@ -385,11 +387,10 @@ struct radeon_ib {
385struct radeon_ib_pool { 387struct radeon_ib_pool {
386 struct mutex mutex; 388 struct mutex mutex;
387 struct radeon_bo *robj; 389 struct radeon_bo *robj;
388 struct list_head scheduled_ibs;
389 struct list_head bogus_ib; 390 struct list_head bogus_ib;
390 struct radeon_ib ibs[RADEON_IB_POOL_SIZE]; 391 struct radeon_ib ibs[RADEON_IB_POOL_SIZE];
391 bool ready; 392 bool ready;
392 DECLARE_BITMAP(alloc_bm, RADEON_IB_POOL_SIZE); 393 unsigned head_id;
393}; 394};
394 395
395struct radeon_cp { 396struct radeon_cp {