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author | Linus Torvalds <torvalds@linux-foundation.org> | 2009-11-11 14:32:04 -0500 |
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committer | Linus Torvalds <torvalds@linux-foundation.org> | 2009-11-11 14:32:04 -0500 |
commit | 6b46362c0ea472b174c336786fd406c504326ad4 (patch) | |
tree | f403d941d88ea9e2ee59ec977cb4d6c7b782018d /drivers/gpu/drm/radeon/radeon.h | |
parent | 961767b75d63c21aa60ee3ccf940288c3c1afde6 (diff) | |
parent | eeba57518c01cf462d87bbfc59049139da47adcb (diff) |
Merge branch 'drm-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/airlied/drm-2.6
* 'drm-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/airlied/drm-2.6: (52 commits)
drm/kms: Init the CRTC info fields for modes forced from the command line.
drm/radeon/r600: CS parser updates
drm/radeon/kms: add debugfs for power management for AtomBIOS devices
drm/radeon/kms: initial mode validation support
drm/radeon/kms/atom/dce3: call transmitter init on mode set
drm/radeon/kms: store detailed connector info
drm/radeon/kms/atom/dce3: fix up usPixelClock calculation for Transmitter tables
drm/radeon/kms/r600: fix rs880 support v2
drm/radeon/kms/r700: fix some typos in chip init
drm/radeon/kms: remove some misleading debugging output
drm/radeon/kms: stop putting VRAM at 0 in MC space on r600s.
drm/radeon/kms: disable D1VGA and D2VGA if enabled
drm/radeon/kms: Don't RMW CP_RB_CNTL
drm/radeon/kms: fix coherency issues on AGP cards.
drm/radeon/kms: fix rc410 suspend/resume.
drm/radeon/kms: add quirk for hp dc5750
drm/radeon/kms/atom: fix potential oops in spread spectrum code
drm/kms: typo fix
drm/radeon/kms/atom: Make card_info per device
drm/radeon/kms/atom: Fix DVO support
...
Diffstat (limited to 'drivers/gpu/drm/radeon/radeon.h')
-rw-r--r-- | drivers/gpu/drm/radeon/radeon.h | 11 |
1 files changed, 11 insertions, 0 deletions
diff --git a/drivers/gpu/drm/radeon/radeon.h b/drivers/gpu/drm/radeon/radeon.h index 5ab35b81c86b..757f5cd37744 100644 --- a/drivers/gpu/drm/radeon/radeon.h +++ b/drivers/gpu/drm/radeon/radeon.h | |||
@@ -139,6 +139,10 @@ struct radeon_clock { | |||
139 | uint32_t default_sclk; | 139 | uint32_t default_sclk; |
140 | }; | 140 | }; |
141 | 141 | ||
142 | /* | ||
143 | * Power management | ||
144 | */ | ||
145 | int radeon_pm_init(struct radeon_device *rdev); | ||
142 | 146 | ||
143 | /* | 147 | /* |
144 | * Fences. | 148 | * Fences. |
@@ -276,6 +280,8 @@ union radeon_gart_table { | |||
276 | struct radeon_gart_table_vram vram; | 280 | struct radeon_gart_table_vram vram; |
277 | }; | 281 | }; |
278 | 282 | ||
283 | #define RADEON_GPU_PAGE_SIZE 4096 | ||
284 | |||
279 | struct radeon_gart { | 285 | struct radeon_gart { |
280 | dma_addr_t table_addr; | 286 | dma_addr_t table_addr; |
281 | unsigned num_gpu_pages; | 287 | unsigned num_gpu_pages; |
@@ -621,7 +627,9 @@ struct radeon_asic { | |||
621 | uint64_t dst_offset, | 627 | uint64_t dst_offset, |
622 | unsigned num_pages, | 628 | unsigned num_pages, |
623 | struct radeon_fence *fence); | 629 | struct radeon_fence *fence); |
630 | uint32_t (*get_engine_clock)(struct radeon_device *rdev); | ||
624 | void (*set_engine_clock)(struct radeon_device *rdev, uint32_t eng_clock); | 631 | void (*set_engine_clock)(struct radeon_device *rdev, uint32_t eng_clock); |
632 | uint32_t (*get_memory_clock)(struct radeon_device *rdev); | ||
625 | void (*set_memory_clock)(struct radeon_device *rdev, uint32_t mem_clock); | 633 | void (*set_memory_clock)(struct radeon_device *rdev, uint32_t mem_clock); |
626 | void (*set_pcie_lanes)(struct radeon_device *rdev, int lanes); | 634 | void (*set_pcie_lanes)(struct radeon_device *rdev, int lanes); |
627 | void (*set_clock_gating)(struct radeon_device *rdev, int enable); | 635 | void (*set_clock_gating)(struct radeon_device *rdev, int enable); |
@@ -783,6 +791,7 @@ struct radeon_device { | |||
783 | const struct firmware *me_fw; /* all family ME firmware */ | 791 | const struct firmware *me_fw; /* all family ME firmware */ |
784 | const struct firmware *pfp_fw; /* r6/700 PFP firmware */ | 792 | const struct firmware *pfp_fw; /* r6/700 PFP firmware */ |
785 | struct r600_blit r600_blit; | 793 | struct r600_blit r600_blit; |
794 | int msi_enabled; /* msi enabled */ | ||
786 | }; | 795 | }; |
787 | 796 | ||
788 | int radeon_device_init(struct radeon_device *rdev, | 797 | int radeon_device_init(struct radeon_device *rdev, |
@@ -952,7 +961,9 @@ static inline void radeon_ring_write(struct radeon_device *rdev, uint32_t v) | |||
952 | #define radeon_copy_blit(rdev, s, d, np, f) (rdev)->asic->copy_blit((rdev), (s), (d), (np), (f)) | 961 | #define radeon_copy_blit(rdev, s, d, np, f) (rdev)->asic->copy_blit((rdev), (s), (d), (np), (f)) |
953 | #define radeon_copy_dma(rdev, s, d, np, f) (rdev)->asic->copy_dma((rdev), (s), (d), (np), (f)) | 962 | #define radeon_copy_dma(rdev, s, d, np, f) (rdev)->asic->copy_dma((rdev), (s), (d), (np), (f)) |
954 | #define radeon_copy(rdev, s, d, np, f) (rdev)->asic->copy((rdev), (s), (d), (np), (f)) | 963 | #define radeon_copy(rdev, s, d, np, f) (rdev)->asic->copy((rdev), (s), (d), (np), (f)) |
964 | #define radeon_get_engine_clock(rdev) (rdev)->asic->get_engine_clock((rdev)) | ||
955 | #define radeon_set_engine_clock(rdev, e) (rdev)->asic->set_engine_clock((rdev), (e)) | 965 | #define radeon_set_engine_clock(rdev, e) (rdev)->asic->set_engine_clock((rdev), (e)) |
966 | #define radeon_get_memory_clock(rdev) (rdev)->asic->get_memory_clock((rdev)) | ||
956 | #define radeon_set_memory_clock(rdev, e) (rdev)->asic->set_engine_clock((rdev), (e)) | 967 | #define radeon_set_memory_clock(rdev, e) (rdev)->asic->set_engine_clock((rdev), (e)) |
957 | #define radeon_set_pcie_lanes(rdev, l) (rdev)->asic->set_pcie_lanes((rdev), (l)) | 968 | #define radeon_set_pcie_lanes(rdev, l) (rdev)->asic->set_pcie_lanes((rdev), (l)) |
958 | #define radeon_set_clock_gating(rdev, e) (rdev)->asic->set_clock_gating((rdev), (e)) | 969 | #define radeon_set_clock_gating(rdev, e) (rdev)->asic->set_clock_gating((rdev), (e)) |