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authorLinus Torvalds <torvalds@linux-foundation.org>2009-09-23 13:09:18 -0400
committerLinus Torvalds <torvalds@linux-foundation.org>2009-09-23 13:09:18 -0400
commit85afd82780df133f03185aec7943ee3e0ed56a7b (patch)
treeda1513f97a50a482e06ffbae2251d9461e8ca1ed /drivers/gpu/drm/radeon/radeon.h
parenta7c367b95a9d8e65e0f0e7da31f700a556794efb (diff)
parent5b31aee9d72f529ee6b60e8d66967f817a0e39fc (diff)
Merge branch 'drm-next' of git://git.kernel.org/pub/scm/linux/kernel/git/airlied/drm-2.6
* 'drm-next' of git://git.kernel.org/pub/scm/linux/kernel/git/airlied/drm-2.6: drm/radeon/r600: set correct pitch for 4 byte copy drm/radeon: consolidate family flags used in pciids.
Diffstat (limited to 'drivers/gpu/drm/radeon/radeon.h')
-rw-r--r--drivers/gpu/drm/radeon/radeon.h59
1 files changed, 1 insertions, 58 deletions
diff --git a/drivers/gpu/drm/radeon/radeon.h b/drivers/gpu/drm/radeon/radeon.h
index c839b608970f..6311b1362594 100644
--- a/drivers/gpu/drm/radeon/radeon.h
+++ b/drivers/gpu/drm/radeon/radeon.h
@@ -49,6 +49,7 @@
49#include <linux/list.h> 49#include <linux/list.h>
50#include <linux/kref.h> 50#include <linux/kref.h>
51 51
52#include "radeon_family.h"
52#include "radeon_mode.h" 53#include "radeon_mode.h"
53#include "radeon_reg.h" 54#include "radeon_reg.h"
54 55
@@ -77,64 +78,6 @@ extern int radeon_tv;
77#define RADEONFB_CONN_LIMIT 4 78#define RADEONFB_CONN_LIMIT 4
78#define RADEON_BIOS_NUM_SCRATCH 8 79#define RADEON_BIOS_NUM_SCRATCH 8
79 80
80enum radeon_family {
81 CHIP_R100,
82 CHIP_RV100,
83 CHIP_RS100,
84 CHIP_RV200,
85 CHIP_RS200,
86 CHIP_R200,
87 CHIP_RV250,
88 CHIP_RS300,
89 CHIP_RV280,
90 CHIP_R300,
91 CHIP_R350,
92 CHIP_RV350,
93 CHIP_RV380,
94 CHIP_R420,
95 CHIP_R423,
96 CHIP_RV410,
97 CHIP_RS400,
98 CHIP_RS480,
99 CHIP_RS600,
100 CHIP_RS690,
101 CHIP_RS740,
102 CHIP_RV515,
103 CHIP_R520,
104 CHIP_RV530,
105 CHIP_RV560,
106 CHIP_RV570,
107 CHIP_R580,
108 CHIP_R600,
109 CHIP_RV610,
110 CHIP_RV630,
111 CHIP_RV670,
112 CHIP_RV620,
113 CHIP_RV635,
114 CHIP_RS780,
115 CHIP_RS880,
116 CHIP_RV770,
117 CHIP_RV730,
118 CHIP_RV710,
119 CHIP_RV740,
120 CHIP_LAST,
121};
122
123enum radeon_chip_flags {
124 RADEON_FAMILY_MASK = 0x0000ffffUL,
125 RADEON_FLAGS_MASK = 0xffff0000UL,
126 RADEON_IS_MOBILITY = 0x00010000UL,
127 RADEON_IS_IGP = 0x00020000UL,
128 RADEON_SINGLE_CRTC = 0x00040000UL,
129 RADEON_IS_AGP = 0x00080000UL,
130 RADEON_HAS_HIERZ = 0x00100000UL,
131 RADEON_IS_PCIE = 0x00200000UL,
132 RADEON_NEW_MEMMAP = 0x00400000UL,
133 RADEON_IS_PCI = 0x00800000UL,
134 RADEON_IS_IGPGART = 0x01000000UL,
135};
136
137
138/* 81/*
139 * Errata workarounds. 82 * Errata workarounds.
140 */ 83 */