diff options
| author | Alex Deucher <alexdeucher@gmail.com> | 2010-06-04 13:10:12 -0400 |
|---|---|---|
| committer | Dave Airlie <airlied@redhat.com> | 2010-08-01 20:00:05 -0400 |
| commit | e7aeeba6a8fb86ac52bcffa0b72942f784f2b37f (patch) | |
| tree | 889d8196e31ec490beba8b801236d7734e8d36bb /drivers/gpu/drm/radeon/radeon.h | |
| parent | 40e2a5c15d09e02a71711735564151c789f95032 (diff) | |
drm/radeon/kms/r6xx+: add query for tile config (v2)
Userspace needs this information to access tiled
buffers via the CPU.
v2: rebased on evergreen accel changes
Signed-off-by: Alex Deucher <alexdeucher@gmail.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
Diffstat (limited to 'drivers/gpu/drm/radeon/radeon.h')
| -rw-r--r-- | drivers/gpu/drm/radeon/radeon.h | 3 |
1 files changed, 3 insertions, 0 deletions
diff --git a/drivers/gpu/drm/radeon/radeon.h b/drivers/gpu/drm/radeon/radeon.h index d4d776d2f1e0..be8420e65f01 100644 --- a/drivers/gpu/drm/radeon/radeon.h +++ b/drivers/gpu/drm/radeon/radeon.h | |||
| @@ -914,6 +914,7 @@ struct r600_asic { | |||
| 914 | unsigned tiling_nbanks; | 914 | unsigned tiling_nbanks; |
| 915 | unsigned tiling_npipes; | 915 | unsigned tiling_npipes; |
| 916 | unsigned tiling_group_size; | 916 | unsigned tiling_group_size; |
| 917 | unsigned tile_config; | ||
| 917 | struct r100_gpu_lockup lockup; | 918 | struct r100_gpu_lockup lockup; |
| 918 | }; | 919 | }; |
| 919 | 920 | ||
| @@ -938,6 +939,7 @@ struct rv770_asic { | |||
| 938 | unsigned tiling_nbanks; | 939 | unsigned tiling_nbanks; |
| 939 | unsigned tiling_npipes; | 940 | unsigned tiling_npipes; |
| 940 | unsigned tiling_group_size; | 941 | unsigned tiling_group_size; |
| 942 | unsigned tile_config; | ||
| 941 | struct r100_gpu_lockup lockup; | 943 | struct r100_gpu_lockup lockup; |
| 942 | }; | 944 | }; |
| 943 | 945 | ||
| @@ -963,6 +965,7 @@ struct evergreen_asic { | |||
| 963 | unsigned tiling_nbanks; | 965 | unsigned tiling_nbanks; |
| 964 | unsigned tiling_npipes; | 966 | unsigned tiling_npipes; |
| 965 | unsigned tiling_group_size; | 967 | unsigned tiling_group_size; |
| 968 | unsigned tile_config; | ||
| 966 | }; | 969 | }; |
| 967 | 970 | ||
| 968 | union radeon_asic_config { | 971 | union radeon_asic_config { |