drm/radeon/kms: add ioport register access

This is required for the NB_MISC regs on rs780/rs880 which
means HDMI/DVI/DP ports using PCIEPHY won't work without
it. It might also help with s/r (asic init) issues on other
atombios cards.

Fixes:
https://bugs.freedesktop.org/show_bug.cgi?id=28774
and similar issues reported by Alberto Milone.

[airlied: Squash io fix patch]

Signed-off-by: Alex Deucher <alexdeucher@gmail.com>
Tested-by: Rafał Miłecki <zajec5@gmail.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>

1 files changed, 25 insertions, 0 deletions

diff --git a/drivers/gpu/drm/radeon/radeon.h b/drivers/gpu/drm/radeon/radeon.h
index 03141755c2ea..966ba0751feb 100644
--- a/drivers/gpu/drm/radeon/radeon.h
+++ b/drivers/gpu/drm/radeon/radeon.h
@@ -1048,6 +1048,9 @@ struct radeon_device {
         uint32_t                        pcie_reg_mask;
         radeon_rreg_t                   pciep_rreg;
         radeon_wreg_t                   pciep_wreg;
+        /* io port */
+        void __iomem                    *rio_mem;
+        resource_size_t                 rio_mem_size;
         struct radeon_clock             clock;
         struct radeon_mc                mc;
         struct radeon_gart              gart;
@@ -1130,6 +1133,26 @@ static inline void r100_mm_wreg(struct radeon_device *rdev, uint32_t reg, uint32
         }
 }
 
+static inline u32 r100_io_rreg(struct radeon_device *rdev, u32 reg)
+{
+        if (reg < rdev->rio_mem_size)
+                return ioread32(rdev->rio_mem + reg);
+        else {
+                iowrite32(reg, rdev->rio_mem + RADEON_MM_INDEX);
+                return ioread32(rdev->rio_mem + RADEON_MM_DATA);
+        }
+}
+
+static inline void r100_io_wreg(struct radeon_device *rdev, u32 reg, u32 v)
+{
+        if (reg < rdev->rio_mem_size)
+                iowrite32(v, rdev->rio_mem + reg);
+        else {
+                iowrite32(reg, rdev->rio_mem + RADEON_MM_INDEX);
+                iowrite32(v, rdev->rio_mem + RADEON_MM_DATA);
+        }
+}
+
 /*
  * Cast helper
  */
@@ -1168,6 +1191,8 @@ static inline void r100_mm_wreg(struct radeon_device *rdev, uint32_t reg, uint32
                 WREG32_PLL(reg, tmp_);                          \
         } while (0)
 #define DREG32_SYS(sqf, rdev, reg) seq_printf((sqf), #reg " : 0x%08X\n", r100_mm_rreg((rdev), (reg)))
+#define RREG32_IO(reg) r100_io_rreg(rdev, (reg))
+#define WREG32_IO(reg, v) r100_io_wreg(rdev, (reg), (v))
 
 /*
  * Indirect registers accessor