diff options
| author | Ilija Hadzic <ihadzic@research.bell-labs.com> | 2013-01-02 18:27:42 -0500 |
|---|---|---|
| committer | Alex Deucher <alexander.deucher@amd.com> | 2013-01-31 16:24:42 -0500 |
| commit | 9ffb7a6dca4fd260db91c808efd4d5c56057600c (patch) | |
| tree | 20e3904abb757c8579b613fe3cedae7a7fe63738 /drivers/gpu/drm/radeon/r600_cs.c | |
| parent | c38f34b53e74dec4e58fef0c895d9e6df7da1190 (diff) | |
drm/radeon: factor out cs_next_is_pkt3_nop function
Once we factored out radeon_cs_packet_parse function,
evergreen_cs_next_is_pkt3_nop and r600_cs_next_is_pkt3_nop
functions became identical, so they can be factored out
into a common function.
Signed-off-by: Ilija Hadzic <ihadzic@research.bell-labs.com>
Reviewed-by: Marek Olšák <maraeo@gmail.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Diffstat (limited to 'drivers/gpu/drm/radeon/r600_cs.c')
| -rw-r--r-- | drivers/gpu/drm/radeon/r600_cs.c | 30 |
1 files changed, 4 insertions, 26 deletions
diff --git a/drivers/gpu/drm/radeon/r600_cs.c b/drivers/gpu/drm/radeon/r600_cs.c index 3870bf8c1bc7..6e6fa97043d0 100644 --- a/drivers/gpu/drm/radeon/r600_cs.c +++ b/drivers/gpu/drm/radeon/r600_cs.c | |||
| @@ -877,28 +877,6 @@ static int r600_cs_packet_next_reloc_nomm(struct radeon_cs_parser *p, | |||
| 877 | } | 877 | } |
| 878 | 878 | ||
| 879 | /** | 879 | /** |
| 880 | * r600_cs_packet_next_is_pkt3_nop() - test if next packet is packet3 nop for reloc | ||
| 881 | * @parser: parser structure holding parsing context. | ||
| 882 | * | ||
| 883 | * Check next packet is relocation packet3, do bo validation and compute | ||
| 884 | * GPU offset using the provided start. | ||
| 885 | **/ | ||
| 886 | static int r600_cs_packet_next_is_pkt3_nop(struct radeon_cs_parser *p) | ||
| 887 | { | ||
| 888 | struct radeon_cs_packet p3reloc; | ||
| 889 | int r; | ||
| 890 | |||
| 891 | r = radeon_cs_packet_parse(p, &p3reloc, p->idx); | ||
| 892 | if (r) { | ||
| 893 | return 0; | ||
| 894 | } | ||
| 895 | if (p3reloc.type != PACKET_TYPE3 || p3reloc.opcode != PACKET3_NOP) { | ||
| 896 | return 0; | ||
| 897 | } | ||
| 898 | return 1; | ||
| 899 | } | ||
| 900 | |||
| 901 | /** | ||
| 902 | * r600_cs_packet_next_vline() - parse userspace VLINE packet | 880 | * r600_cs_packet_next_vline() - parse userspace VLINE packet |
| 903 | * @parser: parser structure holding parsing context. | 881 | * @parser: parser structure holding parsing context. |
| 904 | * | 882 | * |
| @@ -1108,7 +1086,7 @@ static int r600_cs_check_reg(struct radeon_cs_parser *p, u32 reg, u32 idx) | |||
| 1108 | break; | 1086 | break; |
| 1109 | case R_028010_DB_DEPTH_INFO: | 1087 | case R_028010_DB_DEPTH_INFO: |
| 1110 | if (!(p->cs_flags & RADEON_CS_KEEP_TILING_FLAGS) && | 1088 | if (!(p->cs_flags & RADEON_CS_KEEP_TILING_FLAGS) && |
| 1111 | r600_cs_packet_next_is_pkt3_nop(p)) { | 1089 | radeon_cs_packet_next_is_pkt3_nop(p)) { |
| 1112 | r = r600_cs_packet_next_reloc(p, &reloc); | 1090 | r = r600_cs_packet_next_reloc(p, &reloc); |
| 1113 | if (r) { | 1091 | if (r) { |
| 1114 | dev_warn(p->dev, "bad SET_CONTEXT_REG " | 1092 | dev_warn(p->dev, "bad SET_CONTEXT_REG " |
| @@ -1209,7 +1187,7 @@ static int r600_cs_check_reg(struct radeon_cs_parser *p, u32 reg, u32 idx) | |||
| 1209 | case R_0280B8_CB_COLOR6_INFO: | 1187 | case R_0280B8_CB_COLOR6_INFO: |
| 1210 | case R_0280BC_CB_COLOR7_INFO: | 1188 | case R_0280BC_CB_COLOR7_INFO: |
| 1211 | if (!(p->cs_flags & RADEON_CS_KEEP_TILING_FLAGS) && | 1189 | if (!(p->cs_flags & RADEON_CS_KEEP_TILING_FLAGS) && |
| 1212 | r600_cs_packet_next_is_pkt3_nop(p)) { | 1190 | radeon_cs_packet_next_is_pkt3_nop(p)) { |
| 1213 | r = r600_cs_packet_next_reloc(p, &reloc); | 1191 | r = r600_cs_packet_next_reloc(p, &reloc); |
| 1214 | if (r) { | 1192 | if (r) { |
| 1215 | dev_err(p->dev, "bad SET_CONTEXT_REG 0x%04X\n", reg); | 1193 | dev_err(p->dev, "bad SET_CONTEXT_REG 0x%04X\n", reg); |
| @@ -1273,7 +1251,7 @@ static int r600_cs_check_reg(struct radeon_cs_parser *p, u32 reg, u32 idx) | |||
| 1273 | case R_0280F8_CB_COLOR6_FRAG: | 1251 | case R_0280F8_CB_COLOR6_FRAG: |
| 1274 | case R_0280FC_CB_COLOR7_FRAG: | 1252 | case R_0280FC_CB_COLOR7_FRAG: |
| 1275 | tmp = (reg - R_0280E0_CB_COLOR0_FRAG) / 4; | 1253 | tmp = (reg - R_0280E0_CB_COLOR0_FRAG) / 4; |
| 1276 | if (!r600_cs_packet_next_is_pkt3_nop(p)) { | 1254 | if (!radeon_cs_packet_next_is_pkt3_nop(p)) { |
| 1277 | if (!track->cb_color_base_last[tmp]) { | 1255 | if (!track->cb_color_base_last[tmp]) { |
| 1278 | dev_err(p->dev, "Broken old userspace ? no cb_color0_base supplied before trying to write 0x%08X\n", reg); | 1256 | dev_err(p->dev, "Broken old userspace ? no cb_color0_base supplied before trying to write 0x%08X\n", reg); |
| 1279 | return -EINVAL; | 1257 | return -EINVAL; |
| @@ -1304,7 +1282,7 @@ static int r600_cs_check_reg(struct radeon_cs_parser *p, u32 reg, u32 idx) | |||
| 1304 | case R_0280D8_CB_COLOR6_TILE: | 1282 | case R_0280D8_CB_COLOR6_TILE: |
| 1305 | case R_0280DC_CB_COLOR7_TILE: | 1283 | case R_0280DC_CB_COLOR7_TILE: |
| 1306 | tmp = (reg - R_0280C0_CB_COLOR0_TILE) / 4; | 1284 | tmp = (reg - R_0280C0_CB_COLOR0_TILE) / 4; |
| 1307 | if (!r600_cs_packet_next_is_pkt3_nop(p)) { | 1285 | if (!radeon_cs_packet_next_is_pkt3_nop(p)) { |
| 1308 | if (!track->cb_color_base_last[tmp]) { | 1286 | if (!track->cb_color_base_last[tmp]) { |
| 1309 | dev_err(p->dev, "Broken old userspace ? no cb_color0_base supplied before trying to write 0x%08X\n", reg); | 1287 | dev_err(p->dev, "Broken old userspace ? no cb_color0_base supplied before trying to write 0x%08X\n", reg); |
| 1310 | return -EINVAL; | 1288 | return -EINVAL; |