aboutsummaryrefslogtreecommitdiffstats
path: root/drivers/gpu/drm/radeon/r600_audio.c
diff options
context:
space:
mode:
authorAlex Deucher <alexander.deucher@amd.com>2013-04-18 10:50:55 -0400
committerAlex Deucher <alexander.deucher@amd.com>2013-04-23 18:03:53 -0400
commitb1f6f47e3e33c4a74534f1301aca241ffabbb3a0 (patch)
tree22542b1fb96d0cf822c1bdbc4db76fe072260d93 /drivers/gpu/drm/radeon/r600_audio.c
parent26250e65fdabf4d406dc7846da7f948748cbb922 (diff)
drm/radeon: clean up audio dto programming
Split into DCE2/3 and DCE4/5 variants. Still todo is to calculate the DTO dividers properly. Add proper formula to the comments. Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Diffstat (limited to 'drivers/gpu/drm/radeon/r600_audio.c')
-rw-r--r--drivers/gpu/drm/radeon/r600_audio.c59
1 files changed, 0 insertions, 59 deletions
diff --git a/drivers/gpu/drm/radeon/r600_audio.c b/drivers/gpu/drm/radeon/r600_audio.c
index 72561e4a0799..c92eb86a8e55 100644
--- a/drivers/gpu/drm/radeon/r600_audio.c
+++ b/drivers/gpu/drm/radeon/r600_audio.c
@@ -181,65 +181,6 @@ int r600_audio_init(struct radeon_device *rdev)
181} 181}
182 182
183/* 183/*
184 * atach the audio codec to the clock source of the encoder
185 */
186void r600_audio_set_clock(struct drm_encoder *encoder, int clock)
187{
188 struct drm_device *dev = encoder->dev;
189 struct radeon_device *rdev = dev->dev_private;
190 struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder);
191 struct radeon_encoder_atom_dig *dig = radeon_encoder->enc_priv;
192 struct radeon_crtc *radeon_crtc = to_radeon_crtc(encoder->crtc);
193 int base_rate = 48000;
194
195 switch (radeon_encoder->encoder_id) {
196 case ENCODER_OBJECT_ID_INTERNAL_KLDSCP_TMDS1:
197 case ENCODER_OBJECT_ID_INTERNAL_LVTM1:
198 WREG32_P(R600_AUDIO_TIMING, 0, ~0x301);
199 break;
200 case ENCODER_OBJECT_ID_INTERNAL_UNIPHY:
201 case ENCODER_OBJECT_ID_INTERNAL_UNIPHY1:
202 case ENCODER_OBJECT_ID_INTERNAL_UNIPHY2:
203 case ENCODER_OBJECT_ID_INTERNAL_KLDSCP_LVTMA:
204 WREG32_P(R600_AUDIO_TIMING, 0x100, ~0x301);
205 break;
206 default:
207 dev_err(rdev->dev, "Unsupported encoder type 0x%02X\n",
208 radeon_encoder->encoder_id);
209 return;
210 }
211
212 if (ASIC_IS_DCE4(rdev)) {
213 /* TODO: other PLLs? */
214 WREG32(EVERGREEN_AUDIO_PLL1_MUL, base_rate * 10);
215 WREG32(EVERGREEN_AUDIO_PLL1_DIV, clock * 10);
216 WREG32(EVERGREEN_AUDIO_PLL1_UNK, 0x00000071);
217
218 /* Select DTO source */
219 WREG32(0x5ac, radeon_crtc->crtc_id);
220 } else {
221 switch (dig->dig_encoder) {
222 case 0:
223 WREG32(R600_AUDIO_PLL1_MUL, base_rate * 50);
224 WREG32(R600_AUDIO_PLL1_DIV, clock * 100);
225 WREG32(R600_AUDIO_CLK_SRCSEL, 0);
226 break;
227
228 case 1:
229 WREG32(R600_AUDIO_PLL2_MUL, base_rate * 50);
230 WREG32(R600_AUDIO_PLL2_DIV, clock * 100);
231 WREG32(R600_AUDIO_CLK_SRCSEL, 1);
232 break;
233 default:
234 dev_err(rdev->dev,
235 "Unsupported DIG on encoder 0x%02X\n",
236 radeon_encoder->encoder_id);
237 return;
238 }
239 }
240}
241
242/*
243 * release the audio timer 184 * release the audio timer
244 * TODO: How to do this correctly on SMP systems? 185 * TODO: How to do this correctly on SMP systems?
245 */ 186 */