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authorAlex Deucher <alexdeucher@gmail.com>2010-03-16 20:54:38 -0400
committerDave Airlie <airlied@redhat.com>2010-03-30 23:02:06 -0400
commitf47299c55a837af1727bc601e1fc0fa33adaeda5 (patch)
tree3cb63394f5fc9d2adb24922f048e17d688c3c371 /drivers/gpu/drm/radeon/r600.c
parent9e7b414edbf5e037c1462bbd8676465ed2ae0ac3 (diff)
drm/radeon/kms: display watermark fixes
- rs780/880 were using the wrong bandwidth functions - convert r1xx-r4xx to use the same pm sclk/mclk structs as r5xx+ - move bandwidth setup to a common function Signed-off-by: Alex Deucher <alexdeucher@gmail.com> Signed-off-by: Dave Airlie <airlied@redhat.com>
Diffstat (limited to 'drivers/gpu/drm/radeon/r600.c')
-rw-r--r--drivers/gpu/drm/radeon/r600.c9
1 files changed, 2 insertions, 7 deletions
diff --git a/drivers/gpu/drm/radeon/r600.c b/drivers/gpu/drm/radeon/r600.c
index d568262160e1..1aac8bf40864 100644
--- a/drivers/gpu/drm/radeon/r600.c
+++ b/drivers/gpu/drm/radeon/r600.c
@@ -676,7 +676,6 @@ void r600_vram_gtt_location(struct radeon_device *rdev, struct radeon_mc *mc)
676 676
677int r600_mc_init(struct radeon_device *rdev) 677int r600_mc_init(struct radeon_device *rdev)
678{ 678{
679 fixed20_12 a;
680 u32 tmp; 679 u32 tmp;
681 int chansize, numchan; 680 int chansize, numchan;
682 681
@@ -720,14 +719,10 @@ int r600_mc_init(struct radeon_device *rdev)
720 rdev->mc.real_vram_size = rdev->mc.aper_size; 719 rdev->mc.real_vram_size = rdev->mc.aper_size;
721 } 720 }
722 r600_vram_gtt_location(rdev, &rdev->mc); 721 r600_vram_gtt_location(rdev, &rdev->mc);
723 /* FIXME: we should enforce default clock in case GPU is not in 722
724 * default setup
725 */
726 a.full = rfixed_const(100);
727 rdev->pm.sclk.full = rfixed_const(rdev->clock.default_sclk);
728 rdev->pm.sclk.full = rfixed_div(rdev->pm.sclk, a);
729 if (rdev->flags & RADEON_IS_IGP) 723 if (rdev->flags & RADEON_IS_IGP)
730 rdev->mc.igp_sideport_enabled = radeon_atombios_sideport_present(rdev); 724 rdev->mc.igp_sideport_enabled = radeon_atombios_sideport_present(rdev);
725 radeon_update_bandwidth_info(rdev);
731 return 0; 726 return 0;
732} 727}
733 728