diff options
author | Matt Turner <mattst88@gmail.com> | 2009-10-14 00:34:41 -0400 |
---|---|---|
committer | Dave Airlie <airlied@redhat.com> | 2009-10-15 18:49:23 -0400 |
commit | a77f171843d466d4af0d527bcb2d314fafa8afd7 (patch) | |
tree | ca184539d306a819d70ce93b44536fdb6980012a /drivers/gpu/drm/radeon/r600.c | |
parent | dfdd646773941bb6b22c3898a26a109e57c872a2 (diff) |
drm/radeon/kms: use RADEON_GPU_PAGE_SIZE instead of 4096
Signed-off-by: Matt Turner <mattst88@gmail.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
Diffstat (limited to 'drivers/gpu/drm/radeon/r600.c')
-rw-r--r-- | drivers/gpu/drm/radeon/r600.c | 10 |
1 files changed, 5 insertions, 5 deletions
diff --git a/drivers/gpu/drm/radeon/r600.c b/drivers/gpu/drm/radeon/r600.c index 6b43a95a5fb2..1b5aa1fd368b 100644 --- a/drivers/gpu/drm/radeon/r600.c +++ b/drivers/gpu/drm/radeon/r600.c | |||
@@ -1269,9 +1269,9 @@ int r600_cp_resume(struct radeon_device *rdev) | |||
1269 | rb_bufsz = drm_order(rdev->cp.ring_size / 8); | 1269 | rb_bufsz = drm_order(rdev->cp.ring_size / 8); |
1270 | #ifdef __BIG_ENDIAN | 1270 | #ifdef __BIG_ENDIAN |
1271 | WREG32(CP_RB_CNTL, BUF_SWAP_32BIT | RB_NO_UPDATE | | 1271 | WREG32(CP_RB_CNTL, BUF_SWAP_32BIT | RB_NO_UPDATE | |
1272 | (drm_order(4096/8) << 8) | rb_bufsz); | 1272 | (drm_order(RADEON_GPU_PAGE_SIZE/8) << 8) | rb_bufsz); |
1273 | #else | 1273 | #else |
1274 | WREG32(CP_RB_CNTL, RB_NO_UPDATE | (drm_order(4096/8) << 8) | rb_bufsz); | 1274 | WREG32(CP_RB_CNTL, RB_NO_UPDATE | (drm_order(RADEON_GPU_PAGE_SIZE/8) << 8) | rb_bufsz); |
1275 | #endif | 1275 | #endif |
1276 | WREG32(CP_SEM_WAIT_TIMER, 0x4); | 1276 | WREG32(CP_SEM_WAIT_TIMER, 0x4); |
1277 | 1277 | ||
@@ -1400,7 +1400,7 @@ int r600_wb_enable(struct radeon_device *rdev) | |||
1400 | int r; | 1400 | int r; |
1401 | 1401 | ||
1402 | if (rdev->wb.wb_obj == NULL) { | 1402 | if (rdev->wb.wb_obj == NULL) { |
1403 | r = radeon_object_create(rdev, NULL, 4096, true, | 1403 | r = radeon_object_create(rdev, NULL, RADEON_GPU_PAGE_SIZE, true, |
1404 | RADEON_GEM_DOMAIN_GTT, false, &rdev->wb.wb_obj); | 1404 | RADEON_GEM_DOMAIN_GTT, false, &rdev->wb.wb_obj); |
1405 | if (r) { | 1405 | if (r) { |
1406 | dev_warn(rdev->dev, "failed to create WB buffer (%d).\n", r); | 1406 | dev_warn(rdev->dev, "failed to create WB buffer (%d).\n", r); |
@@ -1450,8 +1450,8 @@ int r600_copy_blit(struct radeon_device *rdev, | |||
1450 | uint64_t src_offset, uint64_t dst_offset, | 1450 | uint64_t src_offset, uint64_t dst_offset, |
1451 | unsigned num_pages, struct radeon_fence *fence) | 1451 | unsigned num_pages, struct radeon_fence *fence) |
1452 | { | 1452 | { |
1453 | r600_blit_prepare_copy(rdev, num_pages * 4096); | 1453 | r600_blit_prepare_copy(rdev, num_pages * RADEON_GPU_PAGE_SIZE); |
1454 | r600_kms_blit_copy(rdev, src_offset, dst_offset, num_pages * 4096); | 1454 | r600_kms_blit_copy(rdev, src_offset, dst_offset, num_pages * RADEON_GPU_PAGE_SIZE); |
1455 | r600_blit_done_copy(rdev, fence); | 1455 | r600_blit_done_copy(rdev, fence); |
1456 | return 0; | 1456 | return 0; |
1457 | } | 1457 | } |