diff options
author | Alex Deucher <alexander.deucher@amd.com> | 2012-03-20 17:18:39 -0400 |
---|---|---|
committer | Dave Airlie <airlied@redhat.com> | 2012-03-21 02:55:57 -0400 |
commit | c420c7454f9c13d2dc706516d13fb9329ccacd05 (patch) | |
tree | 7c39ee95586f2a436d81ef1d86a10fef9dfad852 /drivers/gpu/drm/radeon/r600.c | |
parent | e71270fd80e99211a704c981c0f48d4e02a33473 (diff) |
drm/radeon/kms: add support for ucode loading on trinity (v2)
v2: fix check for MC ucode from Tom.
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
Diffstat (limited to 'drivers/gpu/drm/radeon/r600.c')
-rw-r--r-- | drivers/gpu/drm/radeon/r600.c | 21 |
1 files changed, 17 insertions, 4 deletions
diff --git a/drivers/gpu/drm/radeon/r600.c b/drivers/gpu/drm/radeon/r600.c index 924b68718b82..391bd2636a80 100644 --- a/drivers/gpu/drm/radeon/r600.c +++ b/drivers/gpu/drm/radeon/r600.c | |||
@@ -49,6 +49,7 @@ | |||
49 | #define EVERGREEN_PM4_UCODE_SIZE 1376 | 49 | #define EVERGREEN_PM4_UCODE_SIZE 1376 |
50 | #define EVERGREEN_RLC_UCODE_SIZE 768 | 50 | #define EVERGREEN_RLC_UCODE_SIZE 768 |
51 | #define CAYMAN_RLC_UCODE_SIZE 1024 | 51 | #define CAYMAN_RLC_UCODE_SIZE 1024 |
52 | #define ARUBA_RLC_UCODE_SIZE 1536 | ||
52 | 53 | ||
53 | /* Firmware Names */ | 54 | /* Firmware Names */ |
54 | MODULE_FIRMWARE("radeon/R600_pfp.bin"); | 55 | MODULE_FIRMWARE("radeon/R600_pfp.bin"); |
@@ -2861,10 +2862,17 @@ static int r600_rlc_init(struct radeon_device *rdev) | |||
2861 | 2862 | ||
2862 | r600_rlc_stop(rdev); | 2863 | r600_rlc_stop(rdev); |
2863 | 2864 | ||
2864 | WREG32(RLC_HB_BASE, 0); | ||
2865 | WREG32(RLC_HB_CNTL, 0); | 2865 | WREG32(RLC_HB_CNTL, 0); |
2866 | WREG32(RLC_HB_RPTR, 0); | 2866 | |
2867 | WREG32(RLC_HB_WPTR, 0); | 2867 | if (rdev->family == CHIP_ARUBA) { |
2868 | WREG32(TN_RLC_SAVE_AND_RESTORE_BASE, rdev->rlc.save_restore_gpu_addr >> 8); | ||
2869 | WREG32(TN_RLC_CLEAR_STATE_RESTORE_BASE, rdev->rlc.clear_state_gpu_addr >> 8); | ||
2870 | } | ||
2871 | if (rdev->family <= CHIP_CAYMAN) { | ||
2872 | WREG32(RLC_HB_BASE, 0); | ||
2873 | WREG32(RLC_HB_RPTR, 0); | ||
2874 | WREG32(RLC_HB_WPTR, 0); | ||
2875 | } | ||
2868 | if (rdev->family <= CHIP_CAICOS) { | 2876 | if (rdev->family <= CHIP_CAICOS) { |
2869 | WREG32(RLC_HB_WPTR_LSB_ADDR, 0); | 2877 | WREG32(RLC_HB_WPTR_LSB_ADDR, 0); |
2870 | WREG32(RLC_HB_WPTR_MSB_ADDR, 0); | 2878 | WREG32(RLC_HB_WPTR_MSB_ADDR, 0); |
@@ -2873,7 +2881,12 @@ static int r600_rlc_init(struct radeon_device *rdev) | |||
2873 | WREG32(RLC_UCODE_CNTL, 0); | 2881 | WREG32(RLC_UCODE_CNTL, 0); |
2874 | 2882 | ||
2875 | fw_data = (const __be32 *)rdev->rlc_fw->data; | 2883 | fw_data = (const __be32 *)rdev->rlc_fw->data; |
2876 | if (rdev->family >= CHIP_CAYMAN) { | 2884 | if (rdev->family >= CHIP_ARUBA) { |
2885 | for (i = 0; i < ARUBA_RLC_UCODE_SIZE; i++) { | ||
2886 | WREG32(RLC_UCODE_ADDR, i); | ||
2887 | WREG32(RLC_UCODE_DATA, be32_to_cpup(fw_data++)); | ||
2888 | } | ||
2889 | } else if (rdev->family >= CHIP_CAYMAN) { | ||
2877 | for (i = 0; i < CAYMAN_RLC_UCODE_SIZE; i++) { | 2890 | for (i = 0; i < CAYMAN_RLC_UCODE_SIZE; i++) { |
2878 | WREG32(RLC_UCODE_ADDR, i); | 2891 | WREG32(RLC_UCODE_ADDR, i); |
2879 | WREG32(RLC_UCODE_DATA, be32_to_cpup(fw_data++)); | 2892 | WREG32(RLC_UCODE_DATA, be32_to_cpup(fw_data++)); |