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authorDave Airlie <airlied@redhat.com>2011-03-15 21:34:41 -0400
committerDave Airlie <airlied@redhat.com>2011-03-15 21:34:41 -0400
commit38f1cff0863809587b5fd10ecd0c24c8b543a48c (patch)
tree7cf6eb88cdc938c3683209d38311e711a1119400 /drivers/gpu/drm/radeon/r600.c
parent4819d2e4310796c4e9eef674499af9b9caf36b5a (diff)
parent5359533801e3dd3abca5b7d3d985b0b33fd9fe8b (diff)
Merge commit '5359533801e3dd3abca5b7d3d985b0b33fd9fe8b' into drm-core-next
This commit changed an internal radeon structure, that meant a new driver in -next had to be fixed up, merge in the commit and fix up the driver. Also fixes a trivial nouveau merge. Conflicts: drivers/gpu/drm/nouveau/nouveau_mem.c
Diffstat (limited to 'drivers/gpu/drm/radeon/r600.c')
-rw-r--r--drivers/gpu/drm/radeon/r600.c3
1 files changed, 1 insertions, 2 deletions
diff --git a/drivers/gpu/drm/radeon/r600.c b/drivers/gpu/drm/radeon/r600.c
index b409b24207a1..12fdebf9aed8 100644
--- a/drivers/gpu/drm/radeon/r600.c
+++ b/drivers/gpu/drm/radeon/r600.c
@@ -1256,7 +1256,6 @@ int r600_mc_init(struct radeon_device *rdev)
1256 rdev->mc.mc_vram_size = RREG32(CONFIG_MEMSIZE); 1256 rdev->mc.mc_vram_size = RREG32(CONFIG_MEMSIZE);
1257 rdev->mc.real_vram_size = RREG32(CONFIG_MEMSIZE); 1257 rdev->mc.real_vram_size = RREG32(CONFIG_MEMSIZE);
1258 rdev->mc.visible_vram_size = rdev->mc.aper_size; 1258 rdev->mc.visible_vram_size = rdev->mc.aper_size;
1259 rdev->mc.active_vram_size = rdev->mc.visible_vram_size;
1260 r600_vram_gtt_location(rdev, &rdev->mc); 1259 r600_vram_gtt_location(rdev, &rdev->mc);
1261 1260
1262 if (rdev->flags & RADEON_IS_IGP) { 1261 if (rdev->flags & RADEON_IS_IGP) {
@@ -1938,7 +1937,7 @@ void r600_pciep_wreg(struct radeon_device *rdev, u32 reg, u32 v)
1938 */ 1937 */
1939void r600_cp_stop(struct radeon_device *rdev) 1938void r600_cp_stop(struct radeon_device *rdev)
1940{ 1939{
1941 rdev->mc.active_vram_size = rdev->mc.visible_vram_size; 1940 radeon_ttm_set_active_vram_size(rdev, rdev->mc.visible_vram_size);
1942 WREG32(R_0086D8_CP_ME_CNTL, S_0086D8_CP_ME_HALT(1)); 1941 WREG32(R_0086D8_CP_ME_CNTL, S_0086D8_CP_ME_HALT(1));
1943 WREG32(SCRATCH_UMSK, 0); 1942 WREG32(SCRATCH_UMSK, 0);
1944} 1943}