drm/radeon: replace pflip and sw_int counters with atomics

So we can skip the locking. Also renames sw_int to
ring_int, cause that better matches its purpose.

Signed-off-by: Christian Koenig <christian.koenig@amd.com>

1 files changed, 5 insertions, 5 deletions

diff --git a/drivers/gpu/drm/radeon/r600.c b/drivers/gpu/drm/radeon/r600.c
index 9cd77286542c..43d0c41922a5 100644
--- a/drivers/gpu/drm/radeon/r600.c
+++ b/drivers/gpu/drm/radeon/r600.c
@@ -3025,18 +3025,18 @@ int r600_irq_set(struct radeon_device *rdev)
                 hdmi1 = RREG32(HDMI1_AUDIO_PACKET_CONTROL) & ~HDMI0_AZ_FORMAT_WTRIG_MASK;
         }
 
-        if (rdev->irq.sw_int[RADEON_RING_TYPE_GFX_INDEX]) {
+        if (atomic_read(&rdev->irq.ring_int[RADEON_RING_TYPE_GFX_INDEX])) {
                 DRM_DEBUG("r600_irq_set: sw int\n");
                 cp_int_cntl |= RB_INT_ENABLE;
                 cp_int_cntl |= TIME_STAMP_INT_ENABLE;
         }
         if (rdev->irq.crtc_vblank_int[0] ||
-            rdev->irq.pflip[0]) {
+            atomic_read(&rdev->irq.pflip[0])) {
                 DRM_DEBUG("r600_irq_set: vblank 0\n");
                 mode_int |= D1MODE_VBLANK_INT_MASK;
         }
         if (rdev->irq.crtc_vblank_int[1] ||
-            rdev->irq.pflip[1]) {
+            atomic_read(&rdev->irq.pflip[1])) {
                 DRM_DEBUG("r600_irq_set: vblank 1\n");
                 mode_int |= D2MODE_VBLANK_INT_MASK;
         }
@@ -3334,7 +3334,7 @@ restart_ih:
                                                 rdev->pm.vblank_sync = true;
                                                 wake_up(&rdev->irq.vblank_queue);
                                         }
-                                        if (rdev->irq.pflip[0])
+                                        if (atomic_read(&rdev->irq.pflip[0]))
                                                 radeon_crtc_handle_flip(rdev, 0);
                                         rdev->irq.stat_regs.r600.disp_int &= ~LB_D1_VBLANK_INTERRUPT;
                                         DRM_DEBUG("IH: D1 vblank\n");
@@ -3360,7 +3360,7 @@ restart_ih:
                                                 rdev->pm.vblank_sync = true;
                                                 wake_up(&rdev->irq.vblank_queue);
                                         }
-                                        if (rdev->irq.pflip[1])
+                                        if (atomic_read(&rdev->irq.pflip[1]))
                                                 radeon_crtc_handle_flip(rdev, 1);
                                         rdev->irq.stat_regs.r600.disp_int &= ~LB_D2_VBLANK_INTERRUPT;
                                         DRM_DEBUG("IH: D2 vblank\n");