diff options
author | Jerome Glisse <jglisse@redhat.com> | 2010-03-09 09:45:11 -0500 |
---|---|---|
committer | Dave Airlie <airlied@redhat.com> | 2010-04-05 21:21:04 -0400 |
commit | a2d07b7438f015a0349bc9af3c96a8164549bbc5 (patch) | |
tree | 7e05f0789ab09215efc96f8d2fd49eb61c3cab9f /drivers/gpu/drm/radeon/r420.c | |
parent | 225758d8ba4fdcc1e8c9cf617fd89529bd4a9596 (diff) |
drm/radeon/kms: rename gpu_reset to asic_reset
Patch rename gpu_reset to asic_reset in prevision of having
gpu_reset doing more stuff than just basic asic reset.
Signed-off-by: Jerome Glisse <jglisse@redhat.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
Diffstat (limited to 'drivers/gpu/drm/radeon/r420.c')
-rw-r--r-- | drivers/gpu/drm/radeon/r420.c | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/drivers/gpu/drm/radeon/r420.c b/drivers/gpu/drm/radeon/r420.c index 0b8603ca6974..061553aa7a0c 100644 --- a/drivers/gpu/drm/radeon/r420.c +++ b/drivers/gpu/drm/radeon/r420.c | |||
@@ -234,7 +234,7 @@ int r420_resume(struct radeon_device *rdev) | |||
234 | /* Resume clock before doing reset */ | 234 | /* Resume clock before doing reset */ |
235 | r420_clock_resume(rdev); | 235 | r420_clock_resume(rdev); |
236 | /* Reset gpu before posting otherwise ATOM will enter infinite loop */ | 236 | /* Reset gpu before posting otherwise ATOM will enter infinite loop */ |
237 | if (radeon_gpu_reset(rdev)) { | 237 | if (radeon_asic_reset(rdev)) { |
238 | dev_warn(rdev->dev, "GPU reset failed ! (0xE40=0x%08X, 0x7C0=0x%08X)\n", | 238 | dev_warn(rdev->dev, "GPU reset failed ! (0xE40=0x%08X, 0x7C0=0x%08X)\n", |
239 | RREG32(R_000E40_RBBM_STATUS), | 239 | RREG32(R_000E40_RBBM_STATUS), |
240 | RREG32(R_0007C0_CP_STAT)); | 240 | RREG32(R_0007C0_CP_STAT)); |
@@ -315,7 +315,7 @@ int r420_init(struct radeon_device *rdev) | |||
315 | } | 315 | } |
316 | } | 316 | } |
317 | /* Reset gpu before posting otherwise ATOM will enter infinite loop */ | 317 | /* Reset gpu before posting otherwise ATOM will enter infinite loop */ |
318 | if (radeon_gpu_reset(rdev)) { | 318 | if (radeon_asic_reset(rdev)) { |
319 | dev_warn(rdev->dev, | 319 | dev_warn(rdev->dev, |
320 | "GPU reset failed ! (0xE40=0x%08X, 0x7C0=0x%08X)\n", | 320 | "GPU reset failed ! (0xE40=0x%08X, 0x7C0=0x%08X)\n", |
321 | RREG32(R_000E40_RBBM_STATUS), | 321 | RREG32(R_000E40_RBBM_STATUS), |