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authorAlex Deucher <alexdeucher@gmail.com>2010-05-07 15:10:16 -0400
committerDave Airlie <airlied@redhat.com>2010-05-18 04:21:52 -0400
commitce8f53709bf440100cb9d31b1303291551cf517f (patch)
tree6785882522ae04486ae900b5c8dbc700dadad2f3 /drivers/gpu/drm/radeon/r420.c
parentd7311171c4cc8d6231427f7ac5056b939a184b80 (diff)
drm/radeon/kms/pm: rework power management
- Separate dynpm and profile based power management methods. You can select the pm method by echoing the selected method ("dynpm" or "profile") to power_method in sysfs. - Expose basic 4 profile in profile method "default" - default clocks "auto" - select between low and high based on ac/dc state "low" - DC, low power mode "high" - AC, performance mode The current base profile is "default", but it should switched to "auto" once we've tested on more systems. Switching the state is a matter of echoing the requested profile to power_profile in sysfs. The lowest power states are selected automatically when dpms turns the monitors off in all states but default. - Remove dynamic fence-based reclocking for the moment. We can revisit this later once we have basic pm in. - Move pm init/fini to modesetting path. pm is tightly coupled with display state. Make sure display side is initialized before pm. - Add pm suspend/resume functions to make sure pm state is properly reinitialized on resume. - Remove dynpm module option. It's now selectable via sysfs. Signed-off-by: Alex Deucher <alexdeucher@gmail.com> Signed-off-by: Dave Airlie <airlied@redhat.com>
Diffstat (limited to 'drivers/gpu/drm/radeon/r420.c')
-rw-r--r--drivers/gpu/drm/radeon/r420.c32
1 files changed, 29 insertions, 3 deletions
diff --git a/drivers/gpu/drm/radeon/r420.c b/drivers/gpu/drm/radeon/r420.c
index 3759d8384294..87c0e3840034 100644
--- a/drivers/gpu/drm/radeon/r420.c
+++ b/drivers/gpu/drm/radeon/r420.c
@@ -36,6 +36,35 @@
36#include "r420d.h" 36#include "r420d.h"
37#include "r420_reg_safe.h" 37#include "r420_reg_safe.h"
38 38
39void r420_pm_init_profile(struct radeon_device *rdev)
40{
41 /* default */
42 rdev->pm.profiles[PM_PROFILE_DEFAULT_IDX].dpms_off_ps_idx = rdev->pm.default_power_state_index;
43 rdev->pm.profiles[PM_PROFILE_DEFAULT_IDX].dpms_on_ps_idx = rdev->pm.default_power_state_index;
44 rdev->pm.profiles[PM_PROFILE_DEFAULT_IDX].dpms_off_cm_idx = 0;
45 rdev->pm.profiles[PM_PROFILE_DEFAULT_IDX].dpms_on_cm_idx = 0;
46 /* low sh */
47 rdev->pm.profiles[PM_PROFILE_LOW_SH_IDX].dpms_off_ps_idx = 0;
48 rdev->pm.profiles[PM_PROFILE_LOW_SH_IDX].dpms_on_ps_idx = 1;
49 rdev->pm.profiles[PM_PROFILE_LOW_SH_IDX].dpms_off_cm_idx = 0;
50 rdev->pm.profiles[PM_PROFILE_LOW_SH_IDX].dpms_on_cm_idx = 0;
51 /* high sh */
52 rdev->pm.profiles[PM_PROFILE_HIGH_SH_IDX].dpms_off_ps_idx = 0;
53 rdev->pm.profiles[PM_PROFILE_HIGH_SH_IDX].dpms_on_ps_idx = rdev->pm.default_power_state_index;
54 rdev->pm.profiles[PM_PROFILE_HIGH_SH_IDX].dpms_off_cm_idx = 0;
55 rdev->pm.profiles[PM_PROFILE_HIGH_SH_IDX].dpms_on_cm_idx = 0;
56 /* low mh */
57 rdev->pm.profiles[PM_PROFILE_LOW_MH_IDX].dpms_off_ps_idx = 0;
58 rdev->pm.profiles[PM_PROFILE_LOW_MH_IDX].dpms_on_ps_idx = rdev->pm.default_power_state_index;
59 rdev->pm.profiles[PM_PROFILE_LOW_MH_IDX].dpms_off_cm_idx = 0;
60 rdev->pm.profiles[PM_PROFILE_LOW_MH_IDX].dpms_on_cm_idx = 0;
61 /* high mh */
62 rdev->pm.profiles[PM_PROFILE_HIGH_MH_IDX].dpms_off_ps_idx = 0;
63 rdev->pm.profiles[PM_PROFILE_HIGH_MH_IDX].dpms_on_ps_idx = rdev->pm.default_power_state_index;
64 rdev->pm.profiles[PM_PROFILE_HIGH_MH_IDX].dpms_off_cm_idx = 0;
65 rdev->pm.profiles[PM_PROFILE_HIGH_MH_IDX].dpms_on_cm_idx = 0;
66}
67
39static void r420_set_reg_safe(struct radeon_device *rdev) 68static void r420_set_reg_safe(struct radeon_device *rdev)
40{ 69{
41 rdev->config.r300.reg_safe_bm = r420_reg_safe_bm; 70 rdev->config.r300.reg_safe_bm = r420_reg_safe_bm;
@@ -268,7 +297,6 @@ int r420_suspend(struct radeon_device *rdev)
268 297
269void r420_fini(struct radeon_device *rdev) 298void r420_fini(struct radeon_device *rdev)
270{ 299{
271 radeon_pm_fini(rdev);
272 r100_cp_fini(rdev); 300 r100_cp_fini(rdev);
273 r100_wb_fini(rdev); 301 r100_wb_fini(rdev);
274 r100_ib_fini(rdev); 302 r100_ib_fini(rdev);
@@ -328,8 +356,6 @@ int r420_init(struct radeon_device *rdev)
328 356
329 /* Initialize clocks */ 357 /* Initialize clocks */
330 radeon_get_clock_info(rdev->ddev); 358 radeon_get_clock_info(rdev->ddev);
331 /* Initialize power management */
332 radeon_pm_init(rdev);
333 /* initialize AGP */ 359 /* initialize AGP */
334 if (rdev->flags & RADEON_IS_AGP) { 360 if (rdev->flags & RADEON_IS_AGP) {
335 r = radeon_agp_init(rdev); 361 r = radeon_agp_init(rdev);