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authorJerome Glisse <jglisse@redhat.com>2009-10-01 04:20:52 -0400
committerDave Airlie <airlied@redhat.com>2009-10-01 18:51:46 -0400
commitca6ffc64cba0cdd0a2b3fcad0e1d19edcf277ccc (patch)
tree261529acbc21be0d7824770aca8e002f9765cc71 /drivers/gpu/drm/radeon/r300d.h
parentf0ed1f655aa0375e2abba84cc4e8e6c853d48555 (diff)
drm/radeon/kms: Convert RS400/RS480 to new init path & fix legacy VGA (V3)
Also cleanup register specific to RS400/RS480. This patch also fix legacy VGA register used to disable VGA access we were programming wrong register. Now we should properly disable VGA on r100 up to rs400 asics. Note that RS400/RS480 resume is broken, it hangs the computer while reprogramming dynamic clock, doesn't work either without that patch. We need to spend more time investigating this issue. Version 2 of the patch remove dead code that was left commented out in the previous version. Version 3 correct the placement on IGP of the VRAM inside GPU address space to match the stollen RAM placement of IGP. Signed-off-by: Jerome Glisse <jglisse@redhat.com> Signed-off-by: Dave Airlie <airlied@redhat.com>
Diffstat (limited to 'drivers/gpu/drm/radeon/r300d.h')
-rw-r--r--drivers/gpu/drm/radeon/r300d.h92
1 files changed, 92 insertions, 0 deletions
diff --git a/drivers/gpu/drm/radeon/r300d.h b/drivers/gpu/drm/radeon/r300d.h
index d4fa3eb1074f..a6d54dabc50f 100644
--- a/drivers/gpu/drm/radeon/r300d.h
+++ b/drivers/gpu/drm/radeon/r300d.h
@@ -98,4 +98,96 @@
98#define C_000170_AGP_BASE_ADDR 0x00000000 98#define C_000170_AGP_BASE_ADDR 0x00000000
99 99
100 100
101#define R_00000D_SCLK_CNTL 0x00000D
102#define S_00000D_SCLK_SRC_SEL(x) (((x) & 0x7) << 0)
103#define G_00000D_SCLK_SRC_SEL(x) (((x) >> 0) & 0x7)
104#define C_00000D_SCLK_SRC_SEL 0xFFFFFFF8
105#define S_00000D_CP_MAX_DYN_STOP_LAT(x) (((x) & 0x1) << 3)
106#define G_00000D_CP_MAX_DYN_STOP_LAT(x) (((x) >> 3) & 0x1)
107#define C_00000D_CP_MAX_DYN_STOP_LAT 0xFFFFFFF7
108#define S_00000D_HDP_MAX_DYN_STOP_LAT(x) (((x) & 0x1) << 4)
109#define G_00000D_HDP_MAX_DYN_STOP_LAT(x) (((x) >> 4) & 0x1)
110#define C_00000D_HDP_MAX_DYN_STOP_LAT 0xFFFFFFEF
111#define S_00000D_TV_MAX_DYN_STOP_LAT(x) (((x) & 0x1) << 5)
112#define G_00000D_TV_MAX_DYN_STOP_LAT(x) (((x) >> 5) & 0x1)
113#define C_00000D_TV_MAX_DYN_STOP_LAT 0xFFFFFFDF
114#define S_00000D_E2_MAX_DYN_STOP_LAT(x) (((x) & 0x1) << 6)
115#define G_00000D_E2_MAX_DYN_STOP_LAT(x) (((x) >> 6) & 0x1)
116#define C_00000D_E2_MAX_DYN_STOP_LAT 0xFFFFFFBF
117#define S_00000D_SE_MAX_DYN_STOP_LAT(x) (((x) & 0x1) << 7)
118#define G_00000D_SE_MAX_DYN_STOP_LAT(x) (((x) >> 7) & 0x1)
119#define C_00000D_SE_MAX_DYN_STOP_LAT 0xFFFFFF7F
120#define S_00000D_IDCT_MAX_DYN_STOP_LAT(x) (((x) & 0x1) << 8)
121#define G_00000D_IDCT_MAX_DYN_STOP_LAT(x) (((x) >> 8) & 0x1)
122#define C_00000D_IDCT_MAX_DYN_STOP_LAT 0xFFFFFEFF
123#define S_00000D_VIP_MAX_DYN_STOP_LAT(x) (((x) & 0x1) << 9)
124#define G_00000D_VIP_MAX_DYN_STOP_LAT(x) (((x) >> 9) & 0x1)
125#define C_00000D_VIP_MAX_DYN_STOP_LAT 0xFFFFFDFF
126#define S_00000D_RE_MAX_DYN_STOP_LAT(x) (((x) & 0x1) << 10)
127#define G_00000D_RE_MAX_DYN_STOP_LAT(x) (((x) >> 10) & 0x1)
128#define C_00000D_RE_MAX_DYN_STOP_LAT 0xFFFFFBFF
129#define S_00000D_PB_MAX_DYN_STOP_LAT(x) (((x) & 0x1) << 11)
130#define G_00000D_PB_MAX_DYN_STOP_LAT(x) (((x) >> 11) & 0x1)
131#define C_00000D_PB_MAX_DYN_STOP_LAT 0xFFFFF7FF
132#define S_00000D_TAM_MAX_DYN_STOP_LAT(x) (((x) & 0x1) << 12)
133#define G_00000D_TAM_MAX_DYN_STOP_LAT(x) (((x) >> 12) & 0x1)
134#define C_00000D_TAM_MAX_DYN_STOP_LAT 0xFFFFEFFF
135#define S_00000D_TDM_MAX_DYN_STOP_LAT(x) (((x) & 0x1) << 13)
136#define G_00000D_TDM_MAX_DYN_STOP_LAT(x) (((x) >> 13) & 0x1)
137#define C_00000D_TDM_MAX_DYN_STOP_LAT 0xFFFFDFFF
138#define S_00000D_RB_MAX_DYN_STOP_LAT(x) (((x) & 0x1) << 14)
139#define G_00000D_RB_MAX_DYN_STOP_LAT(x) (((x) >> 14) & 0x1)
140#define C_00000D_RB_MAX_DYN_STOP_LAT 0xFFFFBFFF
141#define S_00000D_FORCE_DISP2(x) (((x) & 0x1) << 15)
142#define G_00000D_FORCE_DISP2(x) (((x) >> 15) & 0x1)
143#define C_00000D_FORCE_DISP2 0xFFFF7FFF
144#define S_00000D_FORCE_CP(x) (((x) & 0x1) << 16)
145#define G_00000D_FORCE_CP(x) (((x) >> 16) & 0x1)
146#define C_00000D_FORCE_CP 0xFFFEFFFF
147#define S_00000D_FORCE_HDP(x) (((x) & 0x1) << 17)
148#define G_00000D_FORCE_HDP(x) (((x) >> 17) & 0x1)
149#define C_00000D_FORCE_HDP 0xFFFDFFFF
150#define S_00000D_FORCE_DISP1(x) (((x) & 0x1) << 18)
151#define G_00000D_FORCE_DISP1(x) (((x) >> 18) & 0x1)
152#define C_00000D_FORCE_DISP1 0xFFFBFFFF
153#define S_00000D_FORCE_TOP(x) (((x) & 0x1) << 19)
154#define G_00000D_FORCE_TOP(x) (((x) >> 19) & 0x1)
155#define C_00000D_FORCE_TOP 0xFFF7FFFF
156#define S_00000D_FORCE_E2(x) (((x) & 0x1) << 20)
157#define G_00000D_FORCE_E2(x) (((x) >> 20) & 0x1)
158#define C_00000D_FORCE_E2 0xFFEFFFFF
159#define S_00000D_FORCE_SE(x) (((x) & 0x1) << 21)
160#define G_00000D_FORCE_SE(x) (((x) >> 21) & 0x1)
161#define C_00000D_FORCE_SE 0xFFDFFFFF
162#define S_00000D_FORCE_IDCT(x) (((x) & 0x1) << 22)
163#define G_00000D_FORCE_IDCT(x) (((x) >> 22) & 0x1)
164#define C_00000D_FORCE_IDCT 0xFFBFFFFF
165#define S_00000D_FORCE_VIP(x) (((x) & 0x1) << 23)
166#define G_00000D_FORCE_VIP(x) (((x) >> 23) & 0x1)
167#define C_00000D_FORCE_VIP 0xFF7FFFFF
168#define S_00000D_FORCE_RE(x) (((x) & 0x1) << 24)
169#define G_00000D_FORCE_RE(x) (((x) >> 24) & 0x1)
170#define C_00000D_FORCE_RE 0xFEFFFFFF
171#define S_00000D_FORCE_PB(x) (((x) & 0x1) << 25)
172#define G_00000D_FORCE_PB(x) (((x) >> 25) & 0x1)
173#define C_00000D_FORCE_PB 0xFDFFFFFF
174#define S_00000D_FORCE_TAM(x) (((x) & 0x1) << 26)
175#define G_00000D_FORCE_TAM(x) (((x) >> 26) & 0x1)
176#define C_00000D_FORCE_TAM 0xFBFFFFFF
177#define S_00000D_FORCE_TDM(x) (((x) & 0x1) << 27)
178#define G_00000D_FORCE_TDM(x) (((x) >> 27) & 0x1)
179#define C_00000D_FORCE_TDM 0xF7FFFFFF
180#define S_00000D_FORCE_RB(x) (((x) & 0x1) << 28)
181#define G_00000D_FORCE_RB(x) (((x) >> 28) & 0x1)
182#define C_00000D_FORCE_RB 0xEFFFFFFF
183#define S_00000D_FORCE_TV_SCLK(x) (((x) & 0x1) << 29)
184#define G_00000D_FORCE_TV_SCLK(x) (((x) >> 29) & 0x1)
185#define C_00000D_FORCE_TV_SCLK 0xDFFFFFFF
186#define S_00000D_FORCE_SUBPIC(x) (((x) & 0x1) << 30)
187#define G_00000D_FORCE_SUBPIC(x) (((x) >> 30) & 0x1)
188#define C_00000D_FORCE_SUBPIC 0xBFFFFFFF
189#define S_00000D_FORCE_OV0(x) (((x) & 0x1) << 31)
190#define G_00000D_FORCE_OV0(x) (((x) >> 31) & 0x1)
191#define C_00000D_FORCE_OV0 0x7FFFFFFF
192
101#endif 193#endif