diff options
author | Jerome Glisse <jglisse@redhat.com> | 2009-09-30 09:35:32 -0400 |
---|---|---|
committer | Dave Airlie <airlied@redhat.com> | 2009-10-01 18:51:48 -0400 |
commit | 207bf9e90cd40f91d4662127b8ae3b64e6b101c4 (patch) | |
tree | 2a2620bed9c01545a6a38a841ece647b2c072b21 /drivers/gpu/drm/radeon/r300d.h | |
parent | ca6ffc64cba0cdd0a2b3fcad0e1d19edcf277ccc (diff) |
drm/radeon/kms: Convert R300 to new init path
Also cleanup register specific to R300.
Signed-off-by: Jerome Glisse <jglisse@redhat.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
Diffstat (limited to 'drivers/gpu/drm/radeon/r300d.h')
-rw-r--r-- | drivers/gpu/drm/radeon/r300d.h | 113 |
1 files changed, 113 insertions, 0 deletions
diff --git a/drivers/gpu/drm/radeon/r300d.h b/drivers/gpu/drm/radeon/r300d.h index a6d54dabc50f..4c73114f0de9 100644 --- a/drivers/gpu/drm/radeon/r300d.h +++ b/drivers/gpu/drm/radeon/r300d.h | |||
@@ -96,6 +96,119 @@ | |||
96 | #define S_000170_AGP_BASE_ADDR(x) (((x) & 0xFFFFFFFF) << 0) | 96 | #define S_000170_AGP_BASE_ADDR(x) (((x) & 0xFFFFFFFF) << 0) |
97 | #define G_000170_AGP_BASE_ADDR(x) (((x) >> 0) & 0xFFFFFFFF) | 97 | #define G_000170_AGP_BASE_ADDR(x) (((x) >> 0) & 0xFFFFFFFF) |
98 | #define C_000170_AGP_BASE_ADDR 0x00000000 | 98 | #define C_000170_AGP_BASE_ADDR 0x00000000 |
99 | #define R_0007C0_CP_STAT 0x0007C0 | ||
100 | #define S_0007C0_MRU_BUSY(x) (((x) & 0x1) << 0) | ||
101 | #define G_0007C0_MRU_BUSY(x) (((x) >> 0) & 0x1) | ||
102 | #define C_0007C0_MRU_BUSY 0xFFFFFFFE | ||
103 | #define S_0007C0_MWU_BUSY(x) (((x) & 0x1) << 1) | ||
104 | #define G_0007C0_MWU_BUSY(x) (((x) >> 1) & 0x1) | ||
105 | #define C_0007C0_MWU_BUSY 0xFFFFFFFD | ||
106 | #define S_0007C0_RSIU_BUSY(x) (((x) & 0x1) << 2) | ||
107 | #define G_0007C0_RSIU_BUSY(x) (((x) >> 2) & 0x1) | ||
108 | #define C_0007C0_RSIU_BUSY 0xFFFFFFFB | ||
109 | #define S_0007C0_RCIU_BUSY(x) (((x) & 0x1) << 3) | ||
110 | #define G_0007C0_RCIU_BUSY(x) (((x) >> 3) & 0x1) | ||
111 | #define C_0007C0_RCIU_BUSY 0xFFFFFFF7 | ||
112 | #define S_0007C0_CSF_PRIMARY_BUSY(x) (((x) & 0x1) << 9) | ||
113 | #define G_0007C0_CSF_PRIMARY_BUSY(x) (((x) >> 9) & 0x1) | ||
114 | #define C_0007C0_CSF_PRIMARY_BUSY 0xFFFFFDFF | ||
115 | #define S_0007C0_CSF_INDIRECT_BUSY(x) (((x) & 0x1) << 10) | ||
116 | #define G_0007C0_CSF_INDIRECT_BUSY(x) (((x) >> 10) & 0x1) | ||
117 | #define C_0007C0_CSF_INDIRECT_BUSY 0xFFFFFBFF | ||
118 | #define S_0007C0_CSQ_PRIMARY_BUSY(x) (((x) & 0x1) << 11) | ||
119 | #define G_0007C0_CSQ_PRIMARY_BUSY(x) (((x) >> 11) & 0x1) | ||
120 | #define C_0007C0_CSQ_PRIMARY_BUSY 0xFFFFF7FF | ||
121 | #define S_0007C0_CSQ_INDIRECT_BUSY(x) (((x) & 0x1) << 12) | ||
122 | #define G_0007C0_CSQ_INDIRECT_BUSY(x) (((x) >> 12) & 0x1) | ||
123 | #define C_0007C0_CSQ_INDIRECT_BUSY 0xFFFFEFFF | ||
124 | #define S_0007C0_CSI_BUSY(x) (((x) & 0x1) << 13) | ||
125 | #define G_0007C0_CSI_BUSY(x) (((x) >> 13) & 0x1) | ||
126 | #define C_0007C0_CSI_BUSY 0xFFFFDFFF | ||
127 | #define S_0007C0_CSF_INDIRECT2_BUSY(x) (((x) & 0x1) << 14) | ||
128 | #define G_0007C0_CSF_INDIRECT2_BUSY(x) (((x) >> 14) & 0x1) | ||
129 | #define C_0007C0_CSF_INDIRECT2_BUSY 0xFFFFBFFF | ||
130 | #define S_0007C0_CSQ_INDIRECT2_BUSY(x) (((x) & 0x1) << 15) | ||
131 | #define G_0007C0_CSQ_INDIRECT2_BUSY(x) (((x) >> 15) & 0x1) | ||
132 | #define C_0007C0_CSQ_INDIRECT2_BUSY 0xFFFF7FFF | ||
133 | #define S_0007C0_GUIDMA_BUSY(x) (((x) & 0x1) << 28) | ||
134 | #define G_0007C0_GUIDMA_BUSY(x) (((x) >> 28) & 0x1) | ||
135 | #define C_0007C0_GUIDMA_BUSY 0xEFFFFFFF | ||
136 | #define S_0007C0_VIDDMA_BUSY(x) (((x) & 0x1) << 29) | ||
137 | #define G_0007C0_VIDDMA_BUSY(x) (((x) >> 29) & 0x1) | ||
138 | #define C_0007C0_VIDDMA_BUSY 0xDFFFFFFF | ||
139 | #define S_0007C0_CMDSTRM_BUSY(x) (((x) & 0x1) << 30) | ||
140 | #define G_0007C0_CMDSTRM_BUSY(x) (((x) >> 30) & 0x1) | ||
141 | #define C_0007C0_CMDSTRM_BUSY 0xBFFFFFFF | ||
142 | #define S_0007C0_CP_BUSY(x) (((x) & 0x1) << 31) | ||
143 | #define G_0007C0_CP_BUSY(x) (((x) >> 31) & 0x1) | ||
144 | #define C_0007C0_CP_BUSY 0x7FFFFFFF | ||
145 | #define R_000E40_RBBM_STATUS 0x000E40 | ||
146 | #define S_000E40_CMDFIFO_AVAIL(x) (((x) & 0x7F) << 0) | ||
147 | #define G_000E40_CMDFIFO_AVAIL(x) (((x) >> 0) & 0x7F) | ||
148 | #define C_000E40_CMDFIFO_AVAIL 0xFFFFFF80 | ||
149 | #define S_000E40_HIRQ_ON_RBB(x) (((x) & 0x1) << 8) | ||
150 | #define G_000E40_HIRQ_ON_RBB(x) (((x) >> 8) & 0x1) | ||
151 | #define C_000E40_HIRQ_ON_RBB 0xFFFFFEFF | ||
152 | #define S_000E40_CPRQ_ON_RBB(x) (((x) & 0x1) << 9) | ||
153 | #define G_000E40_CPRQ_ON_RBB(x) (((x) >> 9) & 0x1) | ||
154 | #define C_000E40_CPRQ_ON_RBB 0xFFFFFDFF | ||
155 | #define S_000E40_CFRQ_ON_RBB(x) (((x) & 0x1) << 10) | ||
156 | #define G_000E40_CFRQ_ON_RBB(x) (((x) >> 10) & 0x1) | ||
157 | #define C_000E40_CFRQ_ON_RBB 0xFFFFFBFF | ||
158 | #define S_000E40_HIRQ_IN_RTBUF(x) (((x) & 0x1) << 11) | ||
159 | #define G_000E40_HIRQ_IN_RTBUF(x) (((x) >> 11) & 0x1) | ||
160 | #define C_000E40_HIRQ_IN_RTBUF 0xFFFFF7FF | ||
161 | #define S_000E40_CPRQ_IN_RTBUF(x) (((x) & 0x1) << 12) | ||
162 | #define G_000E40_CPRQ_IN_RTBUF(x) (((x) >> 12) & 0x1) | ||
163 | #define C_000E40_CPRQ_IN_RTBUF 0xFFFFEFFF | ||
164 | #define S_000E40_CFRQ_IN_RTBUF(x) (((x) & 0x1) << 13) | ||
165 | #define G_000E40_CFRQ_IN_RTBUF(x) (((x) >> 13) & 0x1) | ||
166 | #define C_000E40_CFRQ_IN_RTBUF 0xFFFFDFFF | ||
167 | #define S_000E40_CF_PIPE_BUSY(x) (((x) & 0x1) << 14) | ||
168 | #define G_000E40_CF_PIPE_BUSY(x) (((x) >> 14) & 0x1) | ||
169 | #define C_000E40_CF_PIPE_BUSY 0xFFFFBFFF | ||
170 | #define S_000E40_ENG_EV_BUSY(x) (((x) & 0x1) << 15) | ||
171 | #define G_000E40_ENG_EV_BUSY(x) (((x) >> 15) & 0x1) | ||
172 | #define C_000E40_ENG_EV_BUSY 0xFFFF7FFF | ||
173 | #define S_000E40_CP_CMDSTRM_BUSY(x) (((x) & 0x1) << 16) | ||
174 | #define G_000E40_CP_CMDSTRM_BUSY(x) (((x) >> 16) & 0x1) | ||
175 | #define C_000E40_CP_CMDSTRM_BUSY 0xFFFEFFFF | ||
176 | #define S_000E40_E2_BUSY(x) (((x) & 0x1) << 17) | ||
177 | #define G_000E40_E2_BUSY(x) (((x) >> 17) & 0x1) | ||
178 | #define C_000E40_E2_BUSY 0xFFFDFFFF | ||
179 | #define S_000E40_RB2D_BUSY(x) (((x) & 0x1) << 18) | ||
180 | #define G_000E40_RB2D_BUSY(x) (((x) >> 18) & 0x1) | ||
181 | #define C_000E40_RB2D_BUSY 0xFFFBFFFF | ||
182 | #define S_000E40_RB3D_BUSY(x) (((x) & 0x1) << 19) | ||
183 | #define G_000E40_RB3D_BUSY(x) (((x) >> 19) & 0x1) | ||
184 | #define C_000E40_RB3D_BUSY 0xFFF7FFFF | ||
185 | #define S_000E40_VAP_BUSY(x) (((x) & 0x1) << 20) | ||
186 | #define G_000E40_VAP_BUSY(x) (((x) >> 20) & 0x1) | ||
187 | #define C_000E40_VAP_BUSY 0xFFEFFFFF | ||
188 | #define S_000E40_RE_BUSY(x) (((x) & 0x1) << 21) | ||
189 | #define G_000E40_RE_BUSY(x) (((x) >> 21) & 0x1) | ||
190 | #define C_000E40_RE_BUSY 0xFFDFFFFF | ||
191 | #define S_000E40_TAM_BUSY(x) (((x) & 0x1) << 22) | ||
192 | #define G_000E40_TAM_BUSY(x) (((x) >> 22) & 0x1) | ||
193 | #define C_000E40_TAM_BUSY 0xFFBFFFFF | ||
194 | #define S_000E40_TDM_BUSY(x) (((x) & 0x1) << 23) | ||
195 | #define G_000E40_TDM_BUSY(x) (((x) >> 23) & 0x1) | ||
196 | #define C_000E40_TDM_BUSY 0xFF7FFFFF | ||
197 | #define S_000E40_PB_BUSY(x) (((x) & 0x1) << 24) | ||
198 | #define G_000E40_PB_BUSY(x) (((x) >> 24) & 0x1) | ||
199 | #define C_000E40_PB_BUSY 0xFEFFFFFF | ||
200 | #define S_000E40_TIM_BUSY(x) (((x) & 0x1) << 25) | ||
201 | #define G_000E40_TIM_BUSY(x) (((x) >> 25) & 0x1) | ||
202 | #define C_000E40_TIM_BUSY 0xFDFFFFFF | ||
203 | #define S_000E40_GA_BUSY(x) (((x) & 0x1) << 26) | ||
204 | #define G_000E40_GA_BUSY(x) (((x) >> 26) & 0x1) | ||
205 | #define C_000E40_GA_BUSY 0xFBFFFFFF | ||
206 | #define S_000E40_CBA2D_BUSY(x) (((x) & 0x1) << 27) | ||
207 | #define G_000E40_CBA2D_BUSY(x) (((x) >> 27) & 0x1) | ||
208 | #define C_000E40_CBA2D_BUSY 0xF7FFFFFF | ||
209 | #define S_000E40_GUI_ACTIVE(x) (((x) & 0x1) << 31) | ||
210 | #define G_000E40_GUI_ACTIVE(x) (((x) >> 31) & 0x1) | ||
211 | #define C_000E40_GUI_ACTIVE 0x7FFFFFFF | ||
99 | 212 | ||
100 | 213 | ||
101 | #define R_00000D_SCLK_CNTL 0x00000D | 214 | #define R_00000D_SCLK_CNTL 0x00000D |