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authorDave Airlie <airlied@redhat.com>2009-06-29 04:29:11 -0400
committerDave Airlie <airlied@redhat.com>2009-07-15 03:13:02 -0400
commited10f95d60d41033d356fdcf88c240d7065bd5b4 (patch)
tree319558df2249b066c6678c2b54a8ae2fdfa7ae5c /drivers/gpu/drm/radeon/r300.c
parent44b572809581d5a10dbe35aa6bf689f32b9c5ad6 (diff)
drm/radeon/kms: fix some GART table entry bugs.
1. rv370 can accept 40-bit addresses - also at 24-bit shift not 4 bits 2. rs480 table can be in 40-bit space. - 4 bit shift for top 8 bits 3. rs480 table entries can be in 40-bit space. Signed-off-by: Dave Airlie <airlied@redhat.com>
Diffstat (limited to 'drivers/gpu/drm/radeon/r300.c')
-rw-r--r--drivers/gpu/drm/radeon/r300.c4
1 files changed, 3 insertions, 1 deletions
diff --git a/drivers/gpu/drm/radeon/r300.c b/drivers/gpu/drm/radeon/r300.c
index e2ed5bc08170..cd9ea98e9c6f 100644
--- a/drivers/gpu/drm/radeon/r300.c
+++ b/drivers/gpu/drm/radeon/r300.c
@@ -150,7 +150,9 @@ int rv370_pcie_gart_set_page(struct radeon_device *rdev, int i, uint64_t addr)
150 if (i < 0 || i > rdev->gart.num_gpu_pages) { 150 if (i < 0 || i > rdev->gart.num_gpu_pages) {
151 return -EINVAL; 151 return -EINVAL;
152 } 152 }
153 addr = (((u32)addr) >> 8) | ((upper_32_bits(addr) & 0xff) << 4) | 0xC; 153 addr = (lower_32_bits(addr) >> 8) |
154 ((upper_32_bits(addr) & 0xff) << 24) |
155 0xc;
154 writel(cpu_to_le32(addr), ((void __iomem *)ptr) + (i * 4)); 156 writel(cpu_to_le32(addr), ((void __iomem *)ptr) + (i * 4));
155 return 0; 157 return 0;
156} 158}