diff options
author | Jerome Glisse <jglisse@redhat.com> | 2010-03-09 09:45:11 -0500 |
---|---|---|
committer | Dave Airlie <airlied@redhat.com> | 2010-04-05 21:21:04 -0400 |
commit | a2d07b7438f015a0349bc9af3c96a8164549bbc5 (patch) | |
tree | 7e05f0789ab09215efc96f8d2fd49eb61c3cab9f /drivers/gpu/drm/radeon/r300.c | |
parent | 225758d8ba4fdcc1e8c9cf617fd89529bd4a9596 (diff) |
drm/radeon/kms: rename gpu_reset to asic_reset
Patch rename gpu_reset to asic_reset in prevision of having
gpu_reset doing more stuff than just basic asic reset.
Signed-off-by: Jerome Glisse <jglisse@redhat.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
Diffstat (limited to 'drivers/gpu/drm/radeon/r300.c')
-rw-r--r-- | drivers/gpu/drm/radeon/r300.c | 6 |
1 files changed, 3 insertions, 3 deletions
diff --git a/drivers/gpu/drm/radeon/r300.c b/drivers/gpu/drm/radeon/r300.c index 9825fb19331f..7d5de5dbde23 100644 --- a/drivers/gpu/drm/radeon/r300.c +++ b/drivers/gpu/drm/radeon/r300.c | |||
@@ -449,7 +449,7 @@ bool r300_gpu_is_lockup(struct radeon_device *rdev) | |||
449 | return r100_gpu_cp_is_lockup(rdev, &rdev->config.r300.lockup, &rdev->cp); | 449 | return r100_gpu_cp_is_lockup(rdev, &rdev->config.r300.lockup, &rdev->cp); |
450 | } | 450 | } |
451 | 451 | ||
452 | int r300_gpu_reset(struct radeon_device *rdev) | 452 | int r300_asic_reset(struct radeon_device *rdev) |
453 | { | 453 | { |
454 | uint32_t status; | 454 | uint32_t status; |
455 | 455 | ||
@@ -1333,7 +1333,7 @@ int r300_resume(struct radeon_device *rdev) | |||
1333 | /* Resume clock before doing reset */ | 1333 | /* Resume clock before doing reset */ |
1334 | r300_clock_startup(rdev); | 1334 | r300_clock_startup(rdev); |
1335 | /* Reset gpu before posting otherwise ATOM will enter infinite loop */ | 1335 | /* Reset gpu before posting otherwise ATOM will enter infinite loop */ |
1336 | if (radeon_gpu_reset(rdev)) { | 1336 | if (radeon_asic_reset(rdev)) { |
1337 | dev_warn(rdev->dev, "GPU reset failed ! (0xE40=0x%08X, 0x7C0=0x%08X)\n", | 1337 | dev_warn(rdev->dev, "GPU reset failed ! (0xE40=0x%08X, 0x7C0=0x%08X)\n", |
1338 | RREG32(R_000E40_RBBM_STATUS), | 1338 | RREG32(R_000E40_RBBM_STATUS), |
1339 | RREG32(R_0007C0_CP_STAT)); | 1339 | RREG32(R_0007C0_CP_STAT)); |
@@ -1404,7 +1404,7 @@ int r300_init(struct radeon_device *rdev) | |||
1404 | return r; | 1404 | return r; |
1405 | } | 1405 | } |
1406 | /* Reset gpu before posting otherwise ATOM will enter infinite loop */ | 1406 | /* Reset gpu before posting otherwise ATOM will enter infinite loop */ |
1407 | if (radeon_gpu_reset(rdev)) { | 1407 | if (radeon_asic_reset(rdev)) { |
1408 | dev_warn(rdev->dev, | 1408 | dev_warn(rdev->dev, |
1409 | "GPU reset failed ! (0xE40=0x%08X, 0x7C0=0x%08X)\n", | 1409 | "GPU reset failed ! (0xE40=0x%08X, 0x7C0=0x%08X)\n", |
1410 | RREG32(R_000E40_RBBM_STATUS), | 1410 | RREG32(R_000E40_RBBM_STATUS), |