drm/radeon: remove struct radeon_bo_list

Just move all fields into radeon_cs_reloc, removing unused/duplicated fields.

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>

1 files changed, 10 insertions, 10 deletions

diff --git a/drivers/gpu/drm/radeon/r200.c b/drivers/gpu/drm/radeon/r200.c
index b3807edb1936..58f0473aa73f 100644
--- a/drivers/gpu/drm/radeon/r200.c
+++ b/drivers/gpu/drm/radeon/r200.c
@@ -185,7 +185,7 @@ int r200_packet0_check(struct radeon_cs_parser *p,
                 track->zb.robj = reloc->robj;
                 track->zb.offset = idx_value;
                 track->zb_dirty = true;
-                ib[idx] = idx_value + ((u32)reloc->lobj.gpu_offset);
+                ib[idx] = idx_value + ((u32)reloc->gpu_offset);
                 break;
         case RADEON_RB3D_COLOROFFSET:
                 r = radeon_cs_packet_next_reloc(p, &reloc, 0);
@@ -198,7 +198,7 @@ int r200_packet0_check(struct radeon_cs_parser *p,
                 track->cb[0].robj = reloc->robj;
                 track->cb[0].offset = idx_value;
                 track->cb_dirty = true;
-                ib[idx] = idx_value + ((u32)reloc->lobj.gpu_offset);
+                ib[idx] = idx_value + ((u32)reloc->gpu_offset);
                 break;
         case R200_PP_TXOFFSET_0:
         case R200_PP_TXOFFSET_1:
@@ -215,16 +215,16 @@ int r200_packet0_check(struct radeon_cs_parser *p,
                         return r;
                 }
                 if (!(p->cs_flags & RADEON_CS_KEEP_TILING_FLAGS)) {
-                        if (reloc->lobj.tiling_flags & RADEON_TILING_MACRO)
+                        if (reloc->tiling_flags & RADEON_TILING_MACRO)
                                 tile_flags |= R200_TXO_MACRO_TILE;
-                        if (reloc->lobj.tiling_flags & RADEON_TILING_MICRO)
+                        if (reloc->tiling_flags & RADEON_TILING_MICRO)
                                 tile_flags |= R200_TXO_MICRO_TILE;
 
                         tmp = idx_value & ~(0x7 << 2);
                         tmp |= tile_flags;
-                        ib[idx] = tmp + ((u32)reloc->lobj.gpu_offset);
+                        ib[idx] = tmp + ((u32)reloc->gpu_offset);
                 } else
-                        ib[idx] = idx_value + ((u32)reloc->lobj.gpu_offset);
+                        ib[idx] = idx_value + ((u32)reloc->gpu_offset);
                 track->textures[i].robj = reloc->robj;
                 track->tex_dirty = true;
                 break;
@@ -268,7 +268,7 @@ int r200_packet0_check(struct radeon_cs_parser *p,
                         return r;
                 }
                 track->textures[i].cube_info[face - 1].offset = idx_value;
-                ib[idx] = idx_value + ((u32)reloc->lobj.gpu_offset);
+                ib[idx] = idx_value + ((u32)reloc->gpu_offset);
                 track->textures[i].cube_info[face - 1].robj = reloc->robj;
                 track->tex_dirty = true;
                 break;
@@ -287,9 +287,9 @@ int r200_packet0_check(struct radeon_cs_parser *p,
                 }
 
                 if (!(p->cs_flags & RADEON_CS_KEEP_TILING_FLAGS)) {
-                        if (reloc->lobj.tiling_flags & RADEON_TILING_MACRO)
+                        if (reloc->tiling_flags & RADEON_TILING_MACRO)
                                 tile_flags |= RADEON_COLOR_TILE_ENABLE;
-                        if (reloc->lobj.tiling_flags & RADEON_TILING_MICRO)
+                        if (reloc->tiling_flags & RADEON_TILING_MICRO)
                                 tile_flags |= RADEON_COLOR_MICROTILE_ENABLE;
 
                         tmp = idx_value & ~(0x7 << 16);
@@ -362,7 +362,7 @@ int r200_packet0_check(struct radeon_cs_parser *p,
                         radeon_cs_dump_packet(p, pkt);
                         return r;
                 }
-                ib[idx] = idx_value + ((u32)reloc->lobj.gpu_offset);
+                ib[idx] = idx_value + ((u32)reloc->gpu_offset);
                 break;
         case RADEON_PP_CNTL:
                 {