drm/radeon/kms: add r1xx/r2xx support for CS_KEEP_TILING_FLAGS

Previous patch only updates r3xx+.  It's not likely
anyone will use this on r1xx/r2xx, but add it for consistency.

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>

1 files changed, 26 insertions, 20 deletions

diff --git a/drivers/gpu/drm/radeon/r100.c b/drivers/gpu/drm/radeon/r100.c
index bfd36ab643a6..7dd6a1c47345 100644
--- a/drivers/gpu/drm/radeon/r100.c
+++ b/drivers/gpu/drm/radeon/r100.c
@@ -87,23 +87,27 @@ int r100_reloc_pitch_offset(struct radeon_cs_parser *p,
                 r100_cs_dump_packet(p, pkt);
                 return r;
         }
+
         value = radeon_get_ib_value(p, idx);
         tmp = value & 0x003fffff;
         tmp += (((u32)reloc->lobj.gpu_offset) >> 10);
 
-        if (reloc->lobj.tiling_flags & RADEON_TILING_MACRO)
-                tile_flags |= RADEON_DST_TILE_MACRO;
-        if (reloc->lobj.tiling_flags & RADEON_TILING_MICRO) {
-                if (reg == RADEON_SRC_PITCH_OFFSET) {
-                        DRM_ERROR("Cannot src blit from microtiled surface\n");
-                        r100_cs_dump_packet(p, pkt);
-                        return -EINVAL;
+        if (!(p->cs_flags & RADEON_CS_KEEP_TILING_FLAGS)) {
+                if (reloc->lobj.tiling_flags & RADEON_TILING_MACRO)
+                        tile_flags |= RADEON_DST_TILE_MACRO;
+                if (reloc->lobj.tiling_flags & RADEON_TILING_MICRO) {
+                        if (reg == RADEON_SRC_PITCH_OFFSET) {
+                                DRM_ERROR("Cannot src blit from microtiled surface\n");
+                                r100_cs_dump_packet(p, pkt);
+                                return -EINVAL;
+                        }
+                        tile_flags |= RADEON_DST_TILE_MICRO;
                 }
-                tile_flags |= RADEON_DST_TILE_MICRO;
-        }
 
-        tmp |= tile_flags;
-        p->ib->ptr[idx] = (value & 0x3fc00000) | tmp;
+                tmp |= tile_flags;
+                p->ib->ptr[idx] = (value & 0x3fc00000) | tmp;
+        } else
+                p->ib->ptr[idx] = (value & 0xffc00000) | tmp;
         return 0;
 }
 
@@ -1625,15 +1629,17 @@ static int r100_packet0_check(struct radeon_cs_parser *p,
                         r100_cs_dump_packet(p, pkt);
                         return r;
                 }
-
-                if (reloc->lobj.tiling_flags & RADEON_TILING_MACRO)
-                        tile_flags |= RADEON_COLOR_TILE_ENABLE;
-                if (reloc->lobj.tiling_flags & RADEON_TILING_MICRO)
-                        tile_flags |= RADEON_COLOR_MICROTILE_ENABLE;
-
-                tmp = idx_value & ~(0x7 << 16);
-                tmp |= tile_flags;
-                ib[idx] = tmp;
+                if (!(p->cs_flags & RADEON_CS_KEEP_TILING_FLAGS)) {
+                        if (reloc->lobj.tiling_flags & RADEON_TILING_MACRO)
+                                tile_flags |= RADEON_COLOR_TILE_ENABLE;
+                        if (reloc->lobj.tiling_flags & RADEON_TILING_MICRO)
+                                tile_flags |= RADEON_COLOR_MICROTILE_ENABLE;
+
+                        tmp = idx_value & ~(0x7 << 16);
+                        tmp |= tile_flags;
+                        ib[idx] = tmp;
+                } else
+                        ib[idx] = idx_value;
 
                 track->cb[0].pitch = idx_value & RADEON_COLORPITCH_MASK;
                 track->cb_dirty = true;