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authorIlija Hadzic <ihadzic@research.bell-labs.com>2013-01-02 18:27:45 -0500
committerAlex Deucher <alexander.deucher@amd.com>2013-01-31 16:24:44 -0500
commitc3ad63afcdb931159690aa7ba2906079c3b38a13 (patch)
tree86305f43ed6c42c85e19f99c78a141c7d9e2efdb /drivers/gpu/drm/radeon/r100.c
parentd6e18a3406d401edeb96a01c7bb9d1689454c41b (diff)
drm/radeon: rename r100_cs_dump_packet to radeon_cs_dump_packet
This function is not limited to r100, but it can dump a (raw) packet for any ASIC. Rename it accordingly and move its declaration to radeon.h Signed-off-by: Ilija Hadzic <ihadzic@research.bell-labs.com> Reviewed-by: Marek Olšák <maraeo@gmail.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Diffstat (limited to 'drivers/gpu/drm/radeon/r100.c')
-rw-r--r--drivers/gpu/drm/radeon/r100.c52
1 files changed, 19 insertions, 33 deletions
diff --git a/drivers/gpu/drm/radeon/r100.c b/drivers/gpu/drm/radeon/r100.c
index 7842447da4fb..cf7e35903eae 100644
--- a/drivers/gpu/drm/radeon/r100.c
+++ b/drivers/gpu/drm/radeon/r100.c
@@ -1219,7 +1219,7 @@ int r100_reloc_pitch_offset(struct radeon_cs_parser *p,
1219 if (r) { 1219 if (r) {
1220 DRM_ERROR("No reloc for ib[%d]=0x%04X\n", 1220 DRM_ERROR("No reloc for ib[%d]=0x%04X\n",
1221 idx, reg); 1221 idx, reg);
1222 r100_cs_dump_packet(p, pkt); 1222 radeon_cs_dump_packet(p, pkt);
1223 return r; 1223 return r;
1224 } 1224 }
1225 1225
@@ -1233,7 +1233,7 @@ int r100_reloc_pitch_offset(struct radeon_cs_parser *p,
1233 if (reloc->lobj.tiling_flags & RADEON_TILING_MICRO) { 1233 if (reloc->lobj.tiling_flags & RADEON_TILING_MICRO) {
1234 if (reg == RADEON_SRC_PITCH_OFFSET) { 1234 if (reg == RADEON_SRC_PITCH_OFFSET) {
1235 DRM_ERROR("Cannot src blit from microtiled surface\n"); 1235 DRM_ERROR("Cannot src blit from microtiled surface\n");
1236 r100_cs_dump_packet(p, pkt); 1236 radeon_cs_dump_packet(p, pkt);
1237 return -EINVAL; 1237 return -EINVAL;
1238 } 1238 }
1239 tile_flags |= RADEON_DST_TILE_MICRO; 1239 tile_flags |= RADEON_DST_TILE_MICRO;
@@ -1263,7 +1263,7 @@ int r100_packet3_load_vbpntr(struct radeon_cs_parser *p,
1263 if (c > 16) { 1263 if (c > 16) {
1264 DRM_ERROR("Only 16 vertex buffers are allowed %d\n", 1264 DRM_ERROR("Only 16 vertex buffers are allowed %d\n",
1265 pkt->opcode); 1265 pkt->opcode);
1266 r100_cs_dump_packet(p, pkt); 1266 radeon_cs_dump_packet(p, pkt);
1267 return -EINVAL; 1267 return -EINVAL;
1268 } 1268 }
1269 track->num_arrays = c; 1269 track->num_arrays = c;
@@ -1272,7 +1272,7 @@ int r100_packet3_load_vbpntr(struct radeon_cs_parser *p,
1272 if (r) { 1272 if (r) {
1273 DRM_ERROR("No reloc for packet3 %d\n", 1273 DRM_ERROR("No reloc for packet3 %d\n",
1274 pkt->opcode); 1274 pkt->opcode);
1275 r100_cs_dump_packet(p, pkt); 1275 radeon_cs_dump_packet(p, pkt);
1276 return r; 1276 return r;
1277 } 1277 }
1278 idx_value = radeon_get_ib_value(p, idx); 1278 idx_value = radeon_get_ib_value(p, idx);
@@ -1285,7 +1285,7 @@ int r100_packet3_load_vbpntr(struct radeon_cs_parser *p,
1285 if (r) { 1285 if (r) {
1286 DRM_ERROR("No reloc for packet3 %d\n", 1286 DRM_ERROR("No reloc for packet3 %d\n",
1287 pkt->opcode); 1287 pkt->opcode);
1288 r100_cs_dump_packet(p, pkt); 1288 radeon_cs_dump_packet(p, pkt);
1289 return r; 1289 return r;
1290 } 1290 }
1291 ib[idx+2] = radeon_get_ib_value(p, idx + 2) + ((u32)reloc->lobj.gpu_offset); 1291 ib[idx+2] = radeon_get_ib_value(p, idx + 2) + ((u32)reloc->lobj.gpu_offset);
@@ -1298,7 +1298,7 @@ int r100_packet3_load_vbpntr(struct radeon_cs_parser *p,
1298 if (r) { 1298 if (r) {
1299 DRM_ERROR("No reloc for packet3 %d\n", 1299 DRM_ERROR("No reloc for packet3 %d\n",
1300 pkt->opcode); 1300 pkt->opcode);
1301 r100_cs_dump_packet(p, pkt); 1301 radeon_cs_dump_packet(p, pkt);
1302 return r; 1302 return r;
1303 } 1303 }
1304 idx_value = radeon_get_ib_value(p, idx); 1304 idx_value = radeon_get_ib_value(p, idx);
@@ -1355,20 +1355,6 @@ int r100_cs_parse_packet0(struct radeon_cs_parser *p,
1355 return 0; 1355 return 0;
1356} 1356}
1357 1357
1358void r100_cs_dump_packet(struct radeon_cs_parser *p,
1359 struct radeon_cs_packet *pkt)
1360{
1361 volatile uint32_t *ib;
1362 unsigned i;
1363 unsigned idx;
1364
1365 ib = p->ib.ptr;
1366 idx = pkt->idx;
1367 for (i = 0; i <= (pkt->count + 1); i++, idx++) {
1368 DRM_INFO("ib[%d]=0x%08X\n", idx, ib[idx]);
1369 }
1370}
1371
1372/** 1358/**
1373 * r100_cs_packet_next_vline() - parse userspace VLINE packet 1359 * r100_cs_packet_next_vline() - parse userspace VLINE packet
1374 * @parser: parser structure holding parsing context. 1360 * @parser: parser structure holding parsing context.
@@ -1492,14 +1478,14 @@ int r100_cs_packet_next_reloc(struct radeon_cs_parser *p,
1492 if (p3reloc.type != PACKET_TYPE3 || p3reloc.opcode != PACKET3_NOP) { 1478 if (p3reloc.type != PACKET_TYPE3 || p3reloc.opcode != PACKET3_NOP) {
1493 DRM_ERROR("No packet3 for relocation for packet at %d.\n", 1479 DRM_ERROR("No packet3 for relocation for packet at %d.\n",
1494 p3reloc.idx); 1480 p3reloc.idx);
1495 r100_cs_dump_packet(p, &p3reloc); 1481 radeon_cs_dump_packet(p, &p3reloc);
1496 return -EINVAL; 1482 return -EINVAL;
1497 } 1483 }
1498 idx = radeon_get_ib_value(p, p3reloc.idx + 1); 1484 idx = radeon_get_ib_value(p, p3reloc.idx + 1);
1499 if (idx >= relocs_chunk->length_dw) { 1485 if (idx >= relocs_chunk->length_dw) {
1500 DRM_ERROR("Relocs at %d after relocations chunk end %d !\n", 1486 DRM_ERROR("Relocs at %d after relocations chunk end %d !\n",
1501 idx, relocs_chunk->length_dw); 1487 idx, relocs_chunk->length_dw);
1502 r100_cs_dump_packet(p, &p3reloc); 1488 radeon_cs_dump_packet(p, &p3reloc);
1503 return -EINVAL; 1489 return -EINVAL;
1504 } 1490 }
1505 /* FIXME: we assume reloc size is 4 dwords */ 1491 /* FIXME: we assume reloc size is 4 dwords */
@@ -1584,7 +1570,7 @@ static int r100_packet0_check(struct radeon_cs_parser *p,
1584 if (r) { 1570 if (r) {
1585 DRM_ERROR("No reloc for ib[%d]=0x%04X\n", 1571 DRM_ERROR("No reloc for ib[%d]=0x%04X\n",
1586 idx, reg); 1572 idx, reg);
1587 r100_cs_dump_packet(p, pkt); 1573 radeon_cs_dump_packet(p, pkt);
1588 return r; 1574 return r;
1589 } 1575 }
1590 break; 1576 break;
@@ -1601,7 +1587,7 @@ static int r100_packet0_check(struct radeon_cs_parser *p,
1601 if (r) { 1587 if (r) {
1602 DRM_ERROR("No reloc for ib[%d]=0x%04X\n", 1588 DRM_ERROR("No reloc for ib[%d]=0x%04X\n",
1603 idx, reg); 1589 idx, reg);
1604 r100_cs_dump_packet(p, pkt); 1590 radeon_cs_dump_packet(p, pkt);
1605 return r; 1591 return r;
1606 } 1592 }
1607 track->zb.robj = reloc->robj; 1593 track->zb.robj = reloc->robj;
@@ -1614,7 +1600,7 @@ static int r100_packet0_check(struct radeon_cs_parser *p,
1614 if (r) { 1600 if (r) {
1615 DRM_ERROR("No reloc for ib[%d]=0x%04X\n", 1601 DRM_ERROR("No reloc for ib[%d]=0x%04X\n",
1616 idx, reg); 1602 idx, reg);
1617 r100_cs_dump_packet(p, pkt); 1603 radeon_cs_dump_packet(p, pkt);
1618 return r; 1604 return r;
1619 } 1605 }
1620 track->cb[0].robj = reloc->robj; 1606 track->cb[0].robj = reloc->robj;
@@ -1630,7 +1616,7 @@ static int r100_packet0_check(struct radeon_cs_parser *p,
1630 if (r) { 1616 if (r) {
1631 DRM_ERROR("No reloc for ib[%d]=0x%04X\n", 1617 DRM_ERROR("No reloc for ib[%d]=0x%04X\n",
1632 idx, reg); 1618 idx, reg);
1633 r100_cs_dump_packet(p, pkt); 1619 radeon_cs_dump_packet(p, pkt);
1634 return r; 1620 return r;
1635 } 1621 }
1636 if (!(p->cs_flags & RADEON_CS_KEEP_TILING_FLAGS)) { 1622 if (!(p->cs_flags & RADEON_CS_KEEP_TILING_FLAGS)) {
@@ -1657,7 +1643,7 @@ static int r100_packet0_check(struct radeon_cs_parser *p,
1657 if (r) { 1643 if (r) {
1658 DRM_ERROR("No reloc for ib[%d]=0x%04X\n", 1644 DRM_ERROR("No reloc for ib[%d]=0x%04X\n",
1659 idx, reg); 1645 idx, reg);
1660 r100_cs_dump_packet(p, pkt); 1646 radeon_cs_dump_packet(p, pkt);
1661 return r; 1647 return r;
1662 } 1648 }
1663 track->textures[0].cube_info[i].offset = idx_value; 1649 track->textures[0].cube_info[i].offset = idx_value;
@@ -1675,7 +1661,7 @@ static int r100_packet0_check(struct radeon_cs_parser *p,
1675 if (r) { 1661 if (r) {
1676 DRM_ERROR("No reloc for ib[%d]=0x%04X\n", 1662 DRM_ERROR("No reloc for ib[%d]=0x%04X\n",
1677 idx, reg); 1663 idx, reg);
1678 r100_cs_dump_packet(p, pkt); 1664 radeon_cs_dump_packet(p, pkt);
1679 return r; 1665 return r;
1680 } 1666 }
1681 track->textures[1].cube_info[i].offset = idx_value; 1667 track->textures[1].cube_info[i].offset = idx_value;
@@ -1693,7 +1679,7 @@ static int r100_packet0_check(struct radeon_cs_parser *p,
1693 if (r) { 1679 if (r) {
1694 DRM_ERROR("No reloc for ib[%d]=0x%04X\n", 1680 DRM_ERROR("No reloc for ib[%d]=0x%04X\n",
1695 idx, reg); 1681 idx, reg);
1696 r100_cs_dump_packet(p, pkt); 1682 radeon_cs_dump_packet(p, pkt);
1697 return r; 1683 return r;
1698 } 1684 }
1699 track->textures[2].cube_info[i].offset = idx_value; 1685 track->textures[2].cube_info[i].offset = idx_value;
@@ -1711,7 +1697,7 @@ static int r100_packet0_check(struct radeon_cs_parser *p,
1711 if (r) { 1697 if (r) {
1712 DRM_ERROR("No reloc for ib[%d]=0x%04X\n", 1698 DRM_ERROR("No reloc for ib[%d]=0x%04X\n",
1713 idx, reg); 1699 idx, reg);
1714 r100_cs_dump_packet(p, pkt); 1700 radeon_cs_dump_packet(p, pkt);
1715 return r; 1701 return r;
1716 } 1702 }
1717 if (!(p->cs_flags & RADEON_CS_KEEP_TILING_FLAGS)) { 1703 if (!(p->cs_flags & RADEON_CS_KEEP_TILING_FLAGS)) {
@@ -1782,7 +1768,7 @@ static int r100_packet0_check(struct radeon_cs_parser *p,
1782 if (r) { 1768 if (r) {
1783 DRM_ERROR("No reloc for ib[%d]=0x%04X\n", 1769 DRM_ERROR("No reloc for ib[%d]=0x%04X\n",
1784 idx, reg); 1770 idx, reg);
1785 r100_cs_dump_packet(p, pkt); 1771 radeon_cs_dump_packet(p, pkt);
1786 return r; 1772 return r;
1787 } 1773 }
1788 ib[idx] = idx_value + ((u32)reloc->lobj.gpu_offset); 1774 ib[idx] = idx_value + ((u32)reloc->lobj.gpu_offset);
@@ -1942,7 +1928,7 @@ static int r100_packet3_check(struct radeon_cs_parser *p,
1942 r = r100_cs_packet_next_reloc(p, &reloc); 1928 r = r100_cs_packet_next_reloc(p, &reloc);
1943 if (r) { 1929 if (r) {
1944 DRM_ERROR("No reloc for packet3 %d\n", pkt->opcode); 1930 DRM_ERROR("No reloc for packet3 %d\n", pkt->opcode);
1945 r100_cs_dump_packet(p, pkt); 1931 radeon_cs_dump_packet(p, pkt);
1946 return r; 1932 return r;
1947 } 1933 }
1948 ib[idx+1] = radeon_get_ib_value(p, idx+1) + ((u32)reloc->lobj.gpu_offset); 1934 ib[idx+1] = radeon_get_ib_value(p, idx+1) + ((u32)reloc->lobj.gpu_offset);
@@ -1956,7 +1942,7 @@ static int r100_packet3_check(struct radeon_cs_parser *p,
1956 r = r100_cs_packet_next_reloc(p, &reloc); 1942 r = r100_cs_packet_next_reloc(p, &reloc);
1957 if (r) { 1943 if (r) {
1958 DRM_ERROR("No reloc for packet3 %d\n", pkt->opcode); 1944 DRM_ERROR("No reloc for packet3 %d\n", pkt->opcode);
1959 r100_cs_dump_packet(p, pkt); 1945 radeon_cs_dump_packet(p, pkt);
1960 return r; 1946 return r;
1961 } 1947 }
1962 ib[idx] = radeon_get_ib_value(p, idx) + ((u32)reloc->lobj.gpu_offset); 1948 ib[idx] = radeon_get_ib_value(p, idx) + ((u32)reloc->lobj.gpu_offset);