diff options
author | Lauri Kasanen <cand@gmx.com> | 2012-08-31 13:43:50 -0400 |
---|---|---|
committer | Alex Deucher <alexander.deucher@amd.com> | 2012-09-20 13:10:41 -0400 |
commit | 1109ca09b9e2f2766d64d037a88ea8816559b3b3 (patch) | |
tree | b9e045fd634aa413f26bbe24e2e2e10642ecb11a /drivers/gpu/drm/radeon/r100.c | |
parent | b9ce0afeef13b18b12caec476f1e6dd76f0f094b (diff) |
drm/radeon: Mark all possible functions / structs as static
Let's allow GCC to optimize better.
This exposed some five unused functions, but this patch doesn't remove them.
Signed-off-by: Lauri Kasanen <cand@gmx.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Diffstat (limited to 'drivers/gpu/drm/radeon/r100.c')
-rw-r--r-- | drivers/gpu/drm/radeon/r100.c | 14 |
1 files changed, 7 insertions, 7 deletions
diff --git a/drivers/gpu/drm/radeon/r100.c b/drivers/gpu/drm/radeon/r100.c index bf3d7902f5a0..cd11760f2395 100644 --- a/drivers/gpu/drm/radeon/r100.c +++ b/drivers/gpu/drm/radeon/r100.c | |||
@@ -2513,7 +2513,7 @@ void r100_cs_track_clear(struct radeon_device *rdev, struct r100_cs_track *track | |||
2513 | /* | 2513 | /* |
2514 | * Global GPU functions | 2514 | * Global GPU functions |
2515 | */ | 2515 | */ |
2516 | void r100_errata(struct radeon_device *rdev) | 2516 | static void r100_errata(struct radeon_device *rdev) |
2517 | { | 2517 | { |
2518 | rdev->pll_errata = 0; | 2518 | rdev->pll_errata = 0; |
2519 | 2519 | ||
@@ -2529,7 +2529,7 @@ void r100_errata(struct radeon_device *rdev) | |||
2529 | } | 2529 | } |
2530 | 2530 | ||
2531 | /* Wait for vertical sync on primary CRTC */ | 2531 | /* Wait for vertical sync on primary CRTC */ |
2532 | void r100_gpu_wait_for_vsync(struct radeon_device *rdev) | 2532 | static void r100_gpu_wait_for_vsync(struct radeon_device *rdev) |
2533 | { | 2533 | { |
2534 | uint32_t crtc_gen_cntl, tmp; | 2534 | uint32_t crtc_gen_cntl, tmp; |
2535 | int i; | 2535 | int i; |
@@ -2551,7 +2551,7 @@ void r100_gpu_wait_for_vsync(struct radeon_device *rdev) | |||
2551 | } | 2551 | } |
2552 | 2552 | ||
2553 | /* Wait for vertical sync on secondary CRTC */ | 2553 | /* Wait for vertical sync on secondary CRTC */ |
2554 | void r100_gpu_wait_for_vsync2(struct radeon_device *rdev) | 2554 | static void r100_gpu_wait_for_vsync2(struct radeon_device *rdev) |
2555 | { | 2555 | { |
2556 | uint32_t crtc2_gen_cntl, tmp; | 2556 | uint32_t crtc2_gen_cntl, tmp; |
2557 | int i; | 2557 | int i; |
@@ -2572,7 +2572,7 @@ void r100_gpu_wait_for_vsync2(struct radeon_device *rdev) | |||
2572 | } | 2572 | } |
2573 | } | 2573 | } |
2574 | 2574 | ||
2575 | int r100_rbbm_fifo_wait_for_entry(struct radeon_device *rdev, unsigned n) | 2575 | static int r100_rbbm_fifo_wait_for_entry(struct radeon_device *rdev, unsigned n) |
2576 | { | 2576 | { |
2577 | unsigned i; | 2577 | unsigned i; |
2578 | uint32_t tmp; | 2578 | uint32_t tmp; |
@@ -2933,7 +2933,7 @@ void r100_vga_set_state(struct radeon_device *rdev, bool state) | |||
2933 | WREG32(RADEON_CONFIG_CNTL, temp); | 2933 | WREG32(RADEON_CONFIG_CNTL, temp); |
2934 | } | 2934 | } |
2935 | 2935 | ||
2936 | void r100_mc_init(struct radeon_device *rdev) | 2936 | static void r100_mc_init(struct radeon_device *rdev) |
2937 | { | 2937 | { |
2938 | u64 base; | 2938 | u64 base; |
2939 | 2939 | ||
@@ -3005,7 +3005,7 @@ void r100_pll_wreg(struct radeon_device *rdev, uint32_t reg, uint32_t v) | |||
3005 | r100_pll_errata_after_data(rdev); | 3005 | r100_pll_errata_after_data(rdev); |
3006 | } | 3006 | } |
3007 | 3007 | ||
3008 | void r100_set_safe_registers(struct radeon_device *rdev) | 3008 | static void r100_set_safe_registers(struct radeon_device *rdev) |
3009 | { | 3009 | { |
3010 | if (ASIC_IS_RN50(rdev)) { | 3010 | if (ASIC_IS_RN50(rdev)) { |
3011 | rdev->config.r100.reg_safe_bm = rn50_reg_safe_bm; | 3011 | rdev->config.r100.reg_safe_bm = rn50_reg_safe_bm; |
@@ -3947,7 +3947,7 @@ static void r100_mc_program(struct radeon_device *rdev) | |||
3947 | r100_mc_resume(rdev, &save); | 3947 | r100_mc_resume(rdev, &save); |
3948 | } | 3948 | } |
3949 | 3949 | ||
3950 | void r100_clock_startup(struct radeon_device *rdev) | 3950 | static void r100_clock_startup(struct radeon_device *rdev) |
3951 | { | 3951 | { |
3952 | u32 tmp; | 3952 | u32 tmp; |
3953 | 3953 | ||